[MIPS] RM: Collected changes

- EISA support for non PCI RMs (RM200 and RM400-xxx). The major part
  is the splitting of the EISA and onboard ISA of the RM200, which
  makes the EISA bus on the RM200 look like on other RMs.
- 64bit kernel support
- system type detection is now common for big and little endian
- moved sniprom code to arch/mips/fw
- added call_o32 function to arch/mips/fw/lib, which uses a private
  stack for calling prom functions
- fix problem with ISA interrupts, which makes using PIT clockevent
  possible

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4 files changed, 258 insertions, 0 deletions

diff --git a/arch/mips/fw/lib/Makefile b/arch/mips/fw/lib/Makefile
new file mode 100644
index 000000000000..84befc968fc4
--- /dev/null
+++ b/arch/mips/fw/lib/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for generic prom monitor library routines under Linux.
+#
+
+lib-$(CONFIG_64BIT)     += call_o32.o
diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S
new file mode 100644
index 000000000000..bdf7d1d4081a
--- /dev/null
+++ b/arch/mips/fw/lib/call_o32.S
@@ -0,0 +1,97 @@
+/*
+ *      arch/mips/dec/prom/call_o32.S
+ *
+ *      O32 interface for the 64 (or N32) ABI.
+ *
+ *      Copyright (C) 2002  Maciej W. Rozycki
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/asm.h>
+#include <asm/regdef.h>
+
+/* Maximum number of arguments supported.  Must be even!  */
+#define O32_ARGC        32
+/* Number of static registers we save.  */
+#define O32_STATC       11
+/* Frame size for static register  */
+#define O32_FRAMESZ     (SZREG * O32_STATC)
+/* Frame size on new stack */
+#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC)
+
+                .text
+
+/*
+ * O32 function call dispatcher, for interfacing 32-bit ROM routines.
+ *
+ * The standard 64 (N32) calling sequence is supported, with a0
+ * holding a function pointer, a1 a new stack pointer, a2-a7 -- its
+ * first six arguments and the stack -- remaining ones (up to O32_ARGC,
+ * including a2-a7). Static registers, gp and fp are preserved, v0 holds
+ * a result. This code relies on the called o32 function for sp and ra
+ * restoration and this dispatcher has to be placed in a KSEGx (or KUSEG)
+ * address space.  Any pointers passed have to point to addresses within
+ * one of these spaces as well.
+ */
+NESTED(call_o32, O32_FRAMESZ, ra)
+                REG_SUBU        sp,O32_FRAMESZ
+
+                REG_S           ra,O32_FRAMESZ-1*SZREG(sp)
+                REG_S           fp,O32_FRAMESZ-2*SZREG(sp)
+                REG_S           gp,O32_FRAMESZ-3*SZREG(sp)
+                REG_S           s7,O32_FRAMESZ-4*SZREG(sp)
+                REG_S           s6,O32_FRAMESZ-5*SZREG(sp)
+                REG_S           s5,O32_FRAMESZ-6*SZREG(sp)
+                REG_S           s4,O32_FRAMESZ-7*SZREG(sp)
+                REG_S           s3,O32_FRAMESZ-8*SZREG(sp)
+                REG_S           s2,O32_FRAMESZ-9*SZREG(sp)
+                REG_S           s1,O32_FRAMESZ-10*SZREG(sp)
+                REG_S           s0,O32_FRAMESZ-11*SZREG(sp)
+
+                move            jp,a0
+                REG_SUBU        s0,a1,O32_FRAMESZ_NEW
+                REG_S           sp,O32_FRAMESZ_NEW-1*SZREG(s0)
+
+                sll             a0,a2,zero
+                sll             a1,a3,zero
+                sll             a2,a4,zero
+                sll             a3,a5,zero
+                sw              a6,0x10(s0)
+                sw              a7,0x14(s0)
+
+                PTR_LA          t0,O32_FRAMESZ(sp)
+                PTR_LA          t1,0x18(s0)
+                li              t2,O32_ARGC-6
+1:
+                lw              t3,(t0)
+                REG_ADDU        t0,SZREG
+                sw              t3,(t1)
+                REG_SUBU        t2,1
+                REG_ADDU        t1,4
+                bnez            t2,1b
+
+                move            sp,s0
+
+                jalr            jp
+
+                REG_L           sp,O32_FRAMESZ_NEW-1*SZREG(sp)
+
+                REG_L           s0,O32_FRAMESZ-11*SZREG(sp)
+                REG_L           s1,O32_FRAMESZ-10*SZREG(sp)
+                REG_L           s2,O32_FRAMESZ-9*SZREG(sp)
+                REG_L           s3,O32_FRAMESZ-8*SZREG(sp)
+                REG_L           s4,O32_FRAMESZ-7*SZREG(sp)
+                REG_L           s5,O32_FRAMESZ-6*SZREG(sp)
+                REG_L           s6,O32_FRAMESZ-5*SZREG(sp)
+                REG_L           s7,O32_FRAMESZ-4*SZREG(sp)
+                REG_L           gp,O32_FRAMESZ-3*SZREG(sp)
+                REG_L           fp,O32_FRAMESZ-2*SZREG(sp)
+                REG_L           ra,O32_FRAMESZ-1*SZREG(sp)
+
+                REG_ADDU        sp,O32_FRAMESZ
+                jr              ra
+END(call_o32)
diff --git a/arch/mips/fw/sni/Makefile b/arch/mips/fw/sni/Makefile
new file mode 100644
index 000000000000..d9740a3788e2
--- /dev/null
+++ b/arch/mips/fw/sni/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the SNI prom monitor routines under Linux.
+#
+
+lib-$(CONFIG_SNIPROM)   += sniprom.o
diff --git a/arch/mips/fw/sni/sniprom.c b/arch/mips/fw/sni/sniprom.c
new file mode 100644
index 000000000000..96ba99202758
--- /dev/null
+++ b/arch/mips/fw/sni/sniprom.c
@@ -0,0 +1,151 @@
+/*
+ * Big Endian PROM code for SNI RM machines
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2005-2006 Florian Lohoff (flo@rfc822.org)
+ * Copyright (C) 2005-2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/console.h>
+
+#include <asm/addrspace.h>
+#include <asm/sni.h>
+#include <asm/mipsprom.h>
+#include <asm/mipsregs.h>
+#include <asm/bootinfo.h>
+
+/* special SNI prom calls */
+/*
+ * This does not exist in all proms - SINIX compares
+ * the prom env variable "version" against "2.0008"
+ * or greater. If lesser it tries to probe interesting
+ * registers
+ */
+#define PROM_GET_MEMCONF        58
+#define PROM_GET_HWCONF         61
+
+#define PROM_VEC                (u64 *)CKSEG1ADDR(0x1fc00000)
+#define PROM_ENTRY(x)           (PROM_VEC + (x))
+
+#define ___prom_putchar         ((int *(*)(int))PROM_ENTRY(PROM_PUTCHAR))
+#define ___prom_getenv          ((char *(*)(char *))PROM_ENTRY(PROM_GETENV))
+#define ___prom_get_memconf     ((void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF))
+#define ___prom_get_hwconf      ((u32 (*)(void))PROM_ENTRY(PROM_GET_HWCONF))
+
+#ifdef CONFIG_64BIT
+
+static u8 o32_stk[16384];
+#define O32_STK   &o32_stk[sizeof(o32_stk)]
+
+#define __PROM_O32(fun, arg) fun arg __asm__(#fun); \
+                                     __asm__(#fun " = call_o32")
+
+int   __PROM_O32(__prom_putchar, (int *(*)(int), void *, int));
+char *__PROM_O32(__prom_getenv, (char *(*)(char *), void *, char *));
+void  __PROM_O32(__prom_get_memconf, (void (*)(void *), void *, void *));
+u32   __PROM_O32(__prom_get_hwconf, (u32 (*)(void), void *));
+
+#define _prom_putchar(x)     __prom_putchar(___prom_putchar, O32_STK, x)
+#define _prom_getenv(x)      __prom_getenv(___prom_getenv, O32_STK, x)
+#define _prom_get_memconf(x) __prom_get_memconf(___prom_get_memconf, O32_STK, x)
+#define _prom_get_hwconf()   __prom_get_hwconf(___prom_get_hwconf, O32_STK)
+
+#else
+#define _prom_putchar(x)     ___prom_putchar(x)
+#define _prom_getenv(x)      ___prom_getenv(x)
+#define _prom_get_memconf(x) ___prom_get_memconf(x)
+#define _prom_get_hwconf(x)  ___prom_get_hwconf(x)
+#endif
+
+void prom_putchar(char c)
+{
+        _prom_putchar(c);
+}
+
+
+char *prom_getenv(char *s)
+{
+        return _prom_getenv(s);
+}
+
+void *prom_get_hwconf(void)
+{
+        u32 hwconf = _prom_get_hwconf();
+
+        if (hwconf == 0xffffffff)
+                return NULL;
+
+        return (void *)CKSEG1ADDR(hwconf);
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+/*
+ * /proc/cpuinfo system type
+ *
+ */
+char *system_type = "Unknown";
+const char *get_system_type(void)
+{
+        return system_type;
+}
+
+static void __init sni_mem_init(void)
+{
+        int i, memsize;
+        struct membank {
+                u32             size;
+                u32             base;
+                u32             size2;
+                u32             pad1;
+                u32             pad2;
+        } memconf[8];
+        int brd_type = *(unsigned char *)SNI_IDPROM_BRDTYPE;
+
+
+        /* MemSIZE from prom in 16MByte chunks */
+        memsize = *((unsigned char *) SNI_IDPROM_MEMSIZE) * 16;
+
+        pr_debug("IDProm memsize: %u MByte\n", memsize);
+
+        /* get memory bank layout from prom */
+        _prom_get_memconf(&memconf);
+
+        pr_debug("prom_get_mem_conf memory configuration:\n");
+        for (i = 0; i < 8 && memconf[i].size; i++) {
+                if (brd_type == SNI_BRD_PCI_TOWER ||
+                    brd_type == SNI_BRD_PCI_TOWER_CPLUS) {
+                        if (memconf[i].base >= 0x20000000 &&
+                            memconf[i].base <  0x30000000)
+                                memconf[i].base -= 0x20000000;
+                }
+                pr_debug("Bank%d: %08x @ %08x\n", i,
+                        memconf[i].size, memconf[i].base);
+                add_memory_region(memconf[i].base, memconf[i].size,
+                                  BOOT_MEM_RAM);
+        }
+}
+
+void __init prom_init(void)
+{
+        int argc = fw_arg0;
+        u32 *argv = (u32 *)CKSEG0ADDR(fw_arg1);
+        int i;
+
+        sni_mem_init();
+
+        /* copy prom cmdline parameters to kernel cmdline */
+        for (i = 1; i < argc; i++) {
+                strcat(arcs_cmdline, (char *)CKSEG0ADDR(argv[i]));
+                if (i < (argc - 1))
+                        strcat(arcs_cmdline, " ");
+        }
+}