[MIPS] IRQ cleanups

This is a big irq cleanup patch.

* Use set_irq_chip() to register irq_chip.
* Initialize .mask, .unmask, .mask_ack field.  Functions for these
  method are already exist in most case.
* Do not initialize .startup, .shutdown, .enable, .disable fields if
  default routines provided by irq_chip_set_defaults() were suitable.
* Remove redundant irq_desc initializations.
* Remove unnecessary local_irq_save/local_irq_restore, spin_lock.

With this cleanup, it would be easy to switch to slightly lightwait
irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ().

Though whole this patch is quite large, changes in each irq_chip are
not quite simple.  Please review and test on your platform.  Thanks.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 17 insertions, 72 deletions

diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
index 197ed4c2ba04..bf1b83ba925e 100644
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -56,22 +56,6 @@ static void emma2rh_irq_disable(unsigned int irq)
         ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
 }
 
-static unsigned int emma2rh_irq_startup(unsigned int irq)
-{
-        emma2rh_irq_enable(irq);
-        return 0;
-}
-
-#define emma2rh_irq_shutdown    emma2rh_irq_disable
-
-static void emma2rh_irq_ack(unsigned int irq)
-{
-        /* disable interrupt - some handler will re-enable the irq
-         * and if the interrupt is leveled, we will have infinite loop
-         */
-        ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
-}
-
 static void emma2rh_irq_end(unsigned int irq)
 {
         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
@@ -80,25 +64,19 @@ static void emma2rh_irq_end(unsigned int irq)
 
 struct irq_chip emma2rh_irq_controller = {
         .typename = "emma2rh_irq",
-        .startup = emma2rh_irq_startup,
-        .shutdown = emma2rh_irq_shutdown,
-        .enable = emma2rh_irq_enable,
-        .disable = emma2rh_irq_disable,
-        .ack = emma2rh_irq_ack,
+        .ack = emma2rh_irq_disable,
+        .mask = emma2rh_irq_disable,
+        .mask_ack = emma2rh_irq_disable,
+        .unmask = emma2rh_irq_enable,
         .end = emma2rh_irq_end,
-        .set_affinity = NULL    /* no affinity stuff for UP */
 };
 
 void emma2rh_irq_init(u32 irq_base)
 {
         u32 i;
 
-        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) {
-                irq_desc[i].status = IRQ_DISABLED;
-                irq_desc[i].action = NULL;
-                irq_desc[i].depth = 1;
-                irq_desc[i].chip = &emma2rh_irq_controller;
-        }
+        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
+                set_irq_chip(i, &emma2rh_irq_controller);
 
         emma2rh_irq_base = irq_base;
 }
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
index 0b36eb001e62..8e5f08a4245d 100644
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -48,19 +48,6 @@ static void emma2rh_sw_irq_disable(unsigned int irq)
         ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
 }
 
-static unsigned int emma2rh_sw_irq_startup(unsigned int irq)
-{
-        emma2rh_sw_irq_enable(irq);
-        return 0;
-}
-
-#define emma2rh_sw_irq_shutdown emma2rh_sw_irq_disable
-
-static void emma2rh_sw_irq_ack(unsigned int irq)
-{
-        ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
-}
-
 static void emma2rh_sw_irq_end(unsigned int irq)
 {
         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
@@ -69,25 +56,19 @@ static void emma2rh_sw_irq_end(unsigned int irq)
 
 struct irq_chip emma2rh_sw_irq_controller = {
         .typename = "emma2rh_sw_irq",
-        .startup = emma2rh_sw_irq_startup,
-        .shutdown = emma2rh_sw_irq_shutdown,
-        .enable = emma2rh_sw_irq_enable,
-        .disable = emma2rh_sw_irq_disable,
-        .ack = emma2rh_sw_irq_ack,
+        .ack = emma2rh_sw_irq_disable,
+        .mask = emma2rh_sw_irq_disable,
+        .mask_ack = emma2rh_sw_irq_disable,
+        .unmask = emma2rh_sw_irq_enable,
         .end = emma2rh_sw_irq_end,
-        .set_affinity = NULL,
 };
 
 void emma2rh_sw_irq_init(u32 irq_base)
 {
         u32 i;
 
-        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) {
-                irq_desc[i].status = IRQ_DISABLED;
-                irq_desc[i].action = NULL;
-                irq_desc[i].depth = 2;
-                irq_desc[i].chip = &emma2rh_sw_irq_controller;
-        }
+        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
+                set_irq_chip(i, &emma2rh_sw_irq_controller);
 
         emma2rh_sw_irq_base = irq_base;
 }
@@ -126,14 +107,6 @@ static void emma2rh_gpio_irq_disable(unsigned int irq)
         ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
 }
 
-static unsigned int emma2rh_gpio_irq_startup(unsigned int irq)
-{
-        emma2rh_gpio_irq_enable(irq);
-        return 0;
-}
-
-#define emma2rh_gpio_irq_shutdown emma2rh_gpio_irq_disable
-
 static void emma2rh_gpio_irq_ack(unsigned int irq)
 {
         irq -= emma2rh_gpio_irq_base;
@@ -149,25 +122,19 @@ static void emma2rh_gpio_irq_end(unsigned int irq)
 
 struct irq_chip emma2rh_gpio_irq_controller = {
         .typename = "emma2rh_gpio_irq",
-        .startup = emma2rh_gpio_irq_startup,
-        .shutdown = emma2rh_gpio_irq_shutdown,
-        .enable = emma2rh_gpio_irq_enable,
-        .disable = emma2rh_gpio_irq_disable,
         .ack = emma2rh_gpio_irq_ack,
+        .mask = emma2rh_gpio_irq_disable,
+        .mask_ack = emma2rh_gpio_irq_ack,
+        .unmask = emma2rh_gpio_irq_enable,
         .end = emma2rh_gpio_irq_end,
-        .set_affinity = NULL,
 };
 
 void emma2rh_gpio_irq_init(u32 irq_base)
 {
         u32 i;
 
-        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) {
-                irq_desc[i].status = IRQ_DISABLED;
-                irq_desc[i].action = NULL;
-                irq_desc[i].depth = 2;
-                irq_desc[i].chip = &emma2rh_gpio_irq_controller;
-        }
+        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++)
+                set_irq_chip(i, &emma2rh_gpio_irq_controller);
 
         emma2rh_gpio_irq_base = irq_base;
 }