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authorRalf Baechle <ralf@linux-mips.org>2006-10-07 14:44:33 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-07 21:38:28 -0400
commit937a801576f954bd030d7c4a5a94571710d87c0b (patch)
tree48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/emma2rh/common/irq.c
parent31aa36658a123263a9a69896e348b9600e050679 (diff)
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/emma2rh/common/irq.c')
-rw-r--r--arch/mips/emma2rh/common/irq.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
index 3af57693c84c..c191b3e9d9d9 100644
--- a/arch/mips/emma2rh/common/irq.c
+++ b/arch/mips/emma2rh/common/irq.c
@@ -39,7 +39,7 @@
39/* 39/*
40 * the first level int-handler will jump here if it is a emma2rh irq 40 * the first level int-handler will jump here if it is a emma2rh irq
41 */ 41 */
42asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs) 42void emma2rh_irq_dispatch(void)
43{ 43{
44 u32 intStatus; 44 u32 intStatus;
45 u32 bitmask; 45 u32 bitmask;
@@ -56,7 +56,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
56 & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); 56 & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
57 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { 57 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
58 if (swIntStatus & bitmask) { 58 if (swIntStatus & bitmask) {
59 do_IRQ(EMMA2RH_SW_IRQ_BASE + i, regs); 59 do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
60 return; 60 return;
61 } 61 }
62 } 62 }
@@ -65,7 +65,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
65 65
66 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { 66 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
67 if (intStatus & bitmask) { 67 if (intStatus & bitmask) {
68 do_IRQ(EMMA2RH_IRQ_BASE + i, regs); 68 do_IRQ(EMMA2RH_IRQ_BASE + i);
69 return; 69 return;
70 } 70 }
71 } 71 }
@@ -81,7 +81,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
81 & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); 81 & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
82 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { 82 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
83 if (gpioIntStatus & bitmask) { 83 if (gpioIntStatus & bitmask) {
84 do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i, regs); 84 do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
85 return; 85 return;
86 } 86 }
87 } 87 }
@@ -90,7 +90,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
90 90
91 for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { 91 for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
92 if (intStatus & bitmask) { 92 if (intStatus & bitmask) {
93 do_IRQ(EMMA2RH_IRQ_BASE + i, regs); 93 do_IRQ(EMMA2RH_IRQ_BASE + i);
94 return; 94 return;
95 } 95 }
96 } 96 }
@@ -100,7 +100,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
100 100
101 for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { 101 for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
102 if (intStatus & bitmask) { 102 if (intStatus & bitmask) {
103 do_IRQ(EMMA2RH_IRQ_BASE + i, regs); 103 do_IRQ(EMMA2RH_IRQ_BASE + i);
104 return; 104 return;
105 } 105 }
106 } 106 }