diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
commit | 10cc3529072d5415fb040018a8a99aa7a60190b6 (patch) | |
tree | fe07fb5112c9c34c2aecfac982155307bc168f07 /arch/mips/dec | |
parent | aeffdbbaff133b0c3989e20af5baa091d3d0b409 (diff) |
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
This saves a few k on systems which only ever ship with a single CPU type.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec')
-rw-r--r-- | arch/mips/dec/ecc-berr.c | 2 | ||||
-rw-r--r-- | arch/mips/dec/kn02xa-berr.c | 2 | ||||
-rw-r--r-- | arch/mips/dec/prom/init.c | 8 |
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index 6d55e8aab668..6a17c9b508ea 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c | |||
@@ -263,7 +263,7 @@ static inline void dec_kn03_be_init(void) | |||
263 | */ | 263 | */ |
264 | *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | | 264 | *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | |
265 | KN03_MCR_CORRECT; | 265 | KN03_MCR_CORRECT; |
266 | if (current_cpu_data.cputype == CPU_R4400SC) | 266 | if (current_cpu_type() == CPU_R4400SC) |
267 | *mbcs |= KN4K_MB_CSR_EE; | 267 | *mbcs |= KN4K_MB_CSR_EE; |
268 | fast_iob(); | 268 | fast_iob(); |
269 | } | 269 | } |
diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c index 7a053aadcd3a..5f04545c3606 100644 --- a/arch/mips/dec/kn02xa-berr.c +++ b/arch/mips/dec/kn02xa-berr.c | |||
@@ -132,7 +132,7 @@ void __init dec_kn02xa_be_init(void) | |||
132 | volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); | 132 | volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); |
133 | 133 | ||
134 | /* For KN04 we need to make sure EE (?) is enabled in the MB. */ | 134 | /* For KN04 we need to make sure EE (?) is enabled in the MB. */ |
135 | if (current_cpu_data.cputype == CPU_R4000SC) | 135 | if (current_cpu_type() == CPU_R4000SC) |
136 | *mbcs |= KN4K_MB_CSR_EE; | 136 | *mbcs |= KN4K_MB_CSR_EE; |
137 | fast_iob(); | 137 | fast_iob(); |
138 | 138 | ||
diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c index 808c182fd3fa..93f1239af524 100644 --- a/arch/mips/dec/prom/init.c +++ b/arch/mips/dec/prom/init.c | |||
@@ -108,8 +108,8 @@ void __init prom_init(void) | |||
108 | 108 | ||
109 | /* Were we compiled with the right CPU option? */ | 109 | /* Were we compiled with the right CPU option? */ |
110 | #if defined(CONFIG_CPU_R3000) | 110 | #if defined(CONFIG_CPU_R3000) |
111 | if ((current_cpu_data.cputype == CPU_R4000SC) || | 111 | if ((current_cpu_type() == CPU_R4000SC) || |
112 | (current_cpu_data.cputype == CPU_R4400SC)) { | 112 | (current_cpu_type() == CPU_R4400SC)) { |
113 | static char r4k_msg[] __initdata = | 113 | static char r4k_msg[] __initdata = |
114 | "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n"; | 114 | "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n"; |
115 | printk(cpu_msg); | 115 | printk(cpu_msg); |
@@ -119,8 +119,8 @@ void __init prom_init(void) | |||
119 | #endif | 119 | #endif |
120 | 120 | ||
121 | #if defined(CONFIG_CPU_R4X00) | 121 | #if defined(CONFIG_CPU_R4X00) |
122 | if ((current_cpu_data.cputype == CPU_R3000) || | 122 | if ((current_cpu_type() == CPU_R3000) || |
123 | (current_cpu_data.cputype == CPU_R3000A)) { | 123 | (current_cpu_type() == CPU_R3000A)) { |
124 | static char r3k_msg[] __initdata = | 124 | static char r3k_msg[] __initdata = |
125 | "Please recompile with \"CONFIG_CPU_R3000 = y\".\n"; | 125 | "Please recompile with \"CONFIG_CPU_R3000 = y\".\n"; |
126 | printk(cpu_msg); | 126 | printk(cpu_msg); |