diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 14:44:33 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 21:38:28 -0400 |
commit | 937a801576f954bd030d7c4a5a94571710d87c0b (patch) | |
tree | 48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/ddb5xxx/ddb5477/irq.c | |
parent | 31aa36658a123263a9a69896e348b9600e050679 (diff) |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ddb5xxx/ddb5477/irq.c')
-rw-r--r-- | arch/mips/ddb5xxx/ddb5477/irq.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index 513fc6722d84..a8bd2e66705c 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c | |||
@@ -153,8 +153,7 @@ u8 i8259_interrupt_ack(void) | |||
153 | * the first level int-handler will jump here if it is a vrc5477 irq | 153 | * the first level int-handler will jump here if it is a vrc5477 irq |
154 | */ | 154 | */ |
155 | #define NUM_5477_IRQS 32 | 155 | #define NUM_5477_IRQS 32 |
156 | static void | 156 | static void vrc5477_irq_dispatch(void) |
157 | vrc5477_irq_dispatch(struct pt_regs *regs) | ||
158 | { | 157 | { |
159 | u32 intStatus; | 158 | u32 intStatus; |
160 | u32 bitmask; | 159 | u32 bitmask; |
@@ -178,7 +177,7 @@ vrc5477_irq_dispatch(struct pt_regs *regs) | |||
178 | /* check for i8259 interrupts */ | 177 | /* check for i8259 interrupts */ |
179 | if (intStatus & (1 << VRC5477_I8259_CASCADE)) { | 178 | if (intStatus & (1 << VRC5477_I8259_CASCADE)) { |
180 | int i8259_irq = i8259_interrupt_ack(); | 179 | int i8259_irq = i8259_interrupt_ack(); |
181 | do_IRQ(I8259_IRQ_BASE + i8259_irq, regs); | 180 | do_IRQ(I8259_IRQ_BASE + i8259_irq); |
182 | return; | 181 | return; |
183 | } | 182 | } |
184 | } | 183 | } |
@@ -186,7 +185,7 @@ vrc5477_irq_dispatch(struct pt_regs *regs) | |||
186 | for (i=0, bitmask=1; i<= NUM_5477_IRQS; bitmask <<=1, i++) { | 185 | for (i=0, bitmask=1; i<= NUM_5477_IRQS; bitmask <<=1, i++) { |
187 | /* do we need to "and" with the int mask? */ | 186 | /* do we need to "and" with the int mask? */ |
188 | if (intStatus & bitmask) { | 187 | if (intStatus & bitmask) { |
189 | do_IRQ(VRC5477_IRQ_BASE + i, regs); | 188 | do_IRQ(VRC5477_IRQ_BASE + i); |
190 | return; | 189 | return; |
191 | } | 190 | } |
192 | } | 191 | } |
@@ -194,18 +193,18 @@ vrc5477_irq_dispatch(struct pt_regs *regs) | |||
194 | 193 | ||
195 | #define VR5477INTS (STATUSF_IP2|STATUSF_IP3|STATUSF_IP4|STATUSF_IP5|STATUSF_IP6) | 194 | #define VR5477INTS (STATUSF_IP2|STATUSF_IP3|STATUSF_IP4|STATUSF_IP5|STATUSF_IP6) |
196 | 195 | ||
197 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 196 | asmlinkage void plat_irq_dispatch(void) |
198 | { | 197 | { |
199 | unsigned int pending = read_c0_cause() & read_c0_status(); | 198 | unsigned int pending = read_c0_cause() & read_c0_status(); |
200 | 199 | ||
201 | if (pending & STATUSF_IP7) | 200 | if (pending & STATUSF_IP7) |
202 | do_IRQ(CPU_IRQ_BASE + 7, regs); | 201 | do_IRQ(CPU_IRQ_BASE + 7); |
203 | else if (pending & VR5477INTS) | 202 | else if (pending & VR5477INTS) |
204 | vrc5477_irq_dispatch(regs); | 203 | vrc5477_irq_dispatch(); |
205 | else if (pending & STATUSF_IP0) | 204 | else if (pending & STATUSF_IP0) |
206 | do_IRQ(CPU_IRQ_BASE, regs); | 205 | do_IRQ(CPU_IRQ_BASE); |
207 | else if (pending & STATUSF_IP1) | 206 | else if (pending & STATUSF_IP1) |
208 | do_IRQ(CPU_IRQ_BASE + 1, regs); | 207 | do_IRQ(CPU_IRQ_BASE + 1); |
209 | else | 208 | else |
210 | spurious_interrupt(regs); | 209 | spurious_interrupt(); |
211 | } | 210 | } |