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authorRalf Baechle <ralf@linux-mips.org>2007-11-16 18:15:51 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-12-08 23:51:10 -0500
commit5ef1b9a0f6cbb1269fc8b8d7704d146f22bf7aa6 (patch)
tree134ed87dc69815f2f72d2a3b03b7b60f15218a6c /arch/mips/configs
parent8f7e7d67cbcbcfd2c72d496f01f5e4c78853ef7d (diff)
[MIPS] Bigsur: Enable tickless and and highres timers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/configs')
-rw-r--r--arch/mips/configs/bigsur_defconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 80b0c99c2cfb..3c70c9d16d01 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -76,9 +76,13 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
76CONFIG_GENERIC_FIND_NEXT_BIT=y 76CONFIG_GENERIC_FIND_NEXT_BIT=y
77CONFIG_GENERIC_HWEIGHT=y 77CONFIG_GENERIC_HWEIGHT=y
78CONFIG_GENERIC_CALIBRATE_DELAY=y 78CONFIG_GENERIC_CALIBRATE_DELAY=y
79CONFIG_GENERIC_CLOCKEVENTS=y
79CONFIG_GENERIC_TIME=y 80CONFIG_GENERIC_TIME=y
81CONFIG_GENERIC_CMOS_UPDATE=y
80CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 82CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
81# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 83# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
84CONFIG_CEVT_BCM1480=y
85CONFIG_CSRC_BCM1480=y
82CONFIG_DMA_COHERENT=y 86CONFIG_DMA_COHERENT=y
83CONFIG_CPU_BIG_ENDIAN=y 87CONFIG_CPU_BIG_ENDIAN=y
84# CONFIG_CPU_LITTLE_ENDIAN is not set 88# CONFIG_CPU_LITTLE_ENDIAN is not set
@@ -91,6 +95,11 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
91# 95#
92# CPU selection 96# CPU selection
93# 97#
98CONFIG_TICK_ONESHOT=y
99CONFIG_NO_HZ=y
100CONFIG_HIGH_RES_TIMERS=y
101CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
102# CONFIG_CPU_LOONGSON2 is not set
94# CONFIG_CPU_MIPS32_R1 is not set 103# CONFIG_CPU_MIPS32_R1 is not set
95# CONFIG_CPU_MIPS32_R2 is not set 104# CONFIG_CPU_MIPS32_R2 is not set
96# CONFIG_CPU_MIPS64_R1 is not set 105# CONFIG_CPU_MIPS64_R1 is not set