diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:09 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:09 -0400 |
commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/configs/bigsur_defconfig | |
parent | 91a2fcc88634663e9e13dcdfad0e4a860e64aeee (diff) |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/configs/bigsur_defconfig')
-rw-r--r-- | arch/mips/configs/bigsur_defconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig index 700a3a2d688e..30f3e9a2466f 100644 --- a/arch/mips/configs/bigsur_defconfig +++ b/arch/mips/configs/bigsur_defconfig | |||
@@ -69,7 +69,6 @@ CONFIG_SIBYTE_SB1xxx_SOC=y | |||
69 | CONFIG_SIBYTE_CFE=y | 69 | CONFIG_SIBYTE_CFE=y |
70 | # CONFIG_SIBYTE_CFE_CONSOLE is not set | 70 | # CONFIG_SIBYTE_CFE_CONSOLE is not set |
71 | # CONFIG_SIBYTE_BUS_WATCHER is not set | 71 | # CONFIG_SIBYTE_BUS_WATCHER is not set |
72 | # CONFIG_SIBYTE_SB1250_PROF is not set | ||
73 | # CONFIG_SIBYTE_TBPROF is not set | 72 | # CONFIG_SIBYTE_TBPROF is not set |
74 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 73 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
75 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 74 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |