diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 14:44:33 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 21:38:28 -0400 |
commit | 937a801576f954bd030d7c4a5a94571710d87c0b (patch) | |
tree | 48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/cobalt | |
parent | 31aa36658a123263a9a69896e348b9600e050679 (diff) |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cobalt')
-rw-r--r-- | arch/mips/cobalt/irq.c | 51 |
1 files changed, 19 insertions, 32 deletions
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index 0b75f4fb7195..1117fab19733 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c | |||
@@ -42,7 +42,7 @@ | |||
42 | * 15 - IDE1 | 42 | * 15 - IDE1 |
43 | */ | 43 | */ |
44 | 44 | ||
45 | static inline void galileo_irq(struct pt_regs *regs) | 45 | static inline void galileo_irq(void) |
46 | { | 46 | { |
47 | unsigned int mask, pending, devfn; | 47 | unsigned int mask, pending, devfn; |
48 | 48 | ||
@@ -52,7 +52,7 @@ static inline void galileo_irq(struct pt_regs *regs) | |||
52 | if (pending & GALILEO_INTR_T0EXP) { | 52 | if (pending & GALILEO_INTR_T0EXP) { |
53 | 53 | ||
54 | GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS); | 54 | GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS); |
55 | do_IRQ(COBALT_GALILEO_IRQ, regs); | 55 | do_IRQ(COBALT_GALILEO_IRQ); |
56 | 56 | ||
57 | } else if (pending & GALILEO_INTR_RETRY_CTR) { | 57 | } else if (pending & GALILEO_INTR_RETRY_CTR) { |
58 | 58 | ||
@@ -68,44 +68,31 @@ static inline void galileo_irq(struct pt_regs *regs) | |||
68 | } | 68 | } |
69 | } | 69 | } |
70 | 70 | ||
71 | static inline void via_pic_irq(struct pt_regs *regs) | 71 | static inline void via_pic_irq(void) |
72 | { | 72 | { |
73 | int irq; | 73 | int irq; |
74 | 74 | ||
75 | irq = i8259_irq(); | 75 | irq = i8259_irq(); |
76 | if (irq >= 0) | 76 | if (irq >= 0) |
77 | do_IRQ(irq, regs); | 77 | do_IRQ(irq); |
78 | } | 78 | } |
79 | 79 | ||
80 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 80 | asmlinkage void plat_irq_dispatch(void) |
81 | { | 81 | { |
82 | unsigned pending; | 82 | unsigned pending = read_c0_status() & read_c0_cause(); |
83 | 83 | ||
84 | pending = read_c0_status() & read_c0_cause(); | 84 | if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */ |
85 | 85 | galileo_irq(); | |
86 | if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */ | 86 | else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */ |
87 | 87 | via_pic_irq(); | |
88 | galileo_irq(regs); | 88 | else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */ |
89 | 89 | do_IRQ(COBALT_CPU_IRQ + 3); | |
90 | else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */ | 90 | else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */ |
91 | 91 | do_IRQ(COBALT_CPU_IRQ + 4); | |
92 | via_pic_irq(regs); | 92 | else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */ |
93 | 93 | do_IRQ(COBALT_CPU_IRQ + 5); | |
94 | else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */ | 94 | else if (pending & CAUSEF_IP7) /* IRQ 23 */ |
95 | 95 | do_IRQ(COBALT_CPU_IRQ + 7); | |
96 | do_IRQ(COBALT_CPU_IRQ + 3, regs); | ||
97 | |||
98 | else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */ | ||
99 | |||
100 | do_IRQ(COBALT_CPU_IRQ + 4, regs); | ||
101 | |||
102 | else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */ | ||
103 | |||
104 | do_IRQ(COBALT_CPU_IRQ + 5, regs); | ||
105 | |||
106 | else if (pending & CAUSEF_IP7) /* IRQ 23 */ | ||
107 | |||
108 | do_IRQ(COBALT_CPU_IRQ + 7, regs); | ||
109 | } | 96 | } |
110 | 97 | ||
111 | static struct irqaction irq_via = { | 98 | static struct irqaction irq_via = { |