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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 22:21:23 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 22:21:23 -0400
commitdd6d1844af33acb4edd0a40b1770d091a22c94be (patch)
treee6bd3549919773a13b770324a4dddb51b194b452 /arch/mips/cobalt
parent19f71153b9be219756c6b2757921433a69b7975c (diff)
parentaaf76a3245c02faba51c96b9a340c14d6bb0dcc0 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (80 commits) [MIPS] tlbex.c: Cleanup __init usage. [MIPS] WRPPMC serial support move to platform device [MIPS] R1: Fix hazard barriers to make kernels work on R2 also. [MIPS] VPE: reimplement ELF loader. [MIPS] cleanup WRPPMC include files [MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type. [MIPS] SMP: Use ISO C struct initializer for local structs. [MIPS] SMP: Kill useless casts. [MIPS] Kill num_online_cpus() loops. [MIPS] SMP: Implement smp_call_function_mask(). [MIPS] Make facility to convert CPU types to strings generally available. [MIPS] Convert list of CPU types from #define to enum. [MIPS] Optimize get_unaligned / put_unaligned implementations. [MIPS] checkfiles: Fix "need space after that ','" errors. [MIPS] Fix "no space between function name and open parenthesis" warnings. [MIPS] Allow hardwiring of the CPU type to a single type for optimization. [MIPS] tlbex: Size optimize code by declaring a few functions inline. [MIPS] pg-r4k.c: Dump the generated code [MIPS] Cobalt: Remove cobalt_machine_power_off() [MIPS] Cobalt: Move reset port definition to arch/mips/cobalt/reset.c ...
Diffstat (limited to 'arch/mips/cobalt')
-rw-r--r--arch/mips/cobalt/Makefile2
-rw-r--r--arch/mips/cobalt/console.c9
-rw-r--r--arch/mips/cobalt/irq.c116
-rw-r--r--arch/mips/cobalt/led.c62
-rw-r--r--arch/mips/cobalt/reset.c39
-rw-r--r--arch/mips/cobalt/rtc.c5
-rw-r--r--arch/mips/cobalt/serial.c7
-rw-r--r--arch/mips/cobalt/setup.c20
8 files changed, 135 insertions, 125 deletions
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index a043f93f7d08..6b83f4ddc8fc 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Cobalt micro systems family specific parts of the kernel 2# Makefile for the Cobalt micro systems family specific parts of the kernel
3# 3#
4 4
5obj-y := buttons.o irq.o reset.o rtc.o serial.o setup.o 5obj-y := buttons.o irq.o led.o reset.o rtc.o serial.o setup.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8obj-$(CONFIG_EARLY_PRINTK) += console.o 8obj-$(CONFIG_EARLY_PRINTK) += console.o
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index 0485d51f7216..db330e811025 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -1,16 +1,15 @@
1/* 1/*
2 * (C) P. Horton 2006 2 * (C) P. Horton 2006
3 */ 3 */
4#include <linux/io.h>
4#include <linux/serial_reg.h> 5#include <linux/serial_reg.h>
5 6
6#include <asm/addrspace.h> 7#define UART_BASE ((void __iomem *)CKSEG1ADDR(0x1c800000))
7
8#include <cobalt.h>
9 8
10void prom_putchar(char c) 9void prom_putchar(char c)
11{ 10{
12 while(!(COBALT_UART[UART_LSR] & UART_LSR_THRE)) 11 while (!(readb(UART_BASE + UART_LSR) & UART_LSR_THRE))
13 ; 12 ;
14 13
15 COBALT_UART[UART_TX] = c; 14 writeb(c, UART_BASE + UART_TX);
16} 15}
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 950ad1e8be44..ac4fb912649d 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -15,102 +15,48 @@
15 15
16#include <asm/i8259.h> 16#include <asm/i8259.h>
17#include <asm/irq_cpu.h> 17#include <asm/irq_cpu.h>
18#include <asm/irq_gt641xx.h>
18#include <asm/gt64120.h> 19#include <asm/gt64120.h>
19 20
20#include <cobalt.h> 21#include <irq.h>
21
22/*
23 * We have two types of interrupts that we handle, ones that come in through
24 * the CPU interrupt lines, and ones that come in on the via chip. The CPU
25 * mappings are:
26 *
27 * 16 - Software interrupt 0 (unused) IE_SW0
28 * 17 - Software interrupt 1 (unused) IE_SW1
29 * 18 - Galileo chip (timer) IE_IRQ0
30 * 19 - Tulip 0 + NCR SCSI IE_IRQ1
31 * 20 - Tulip 1 IE_IRQ2
32 * 21 - 16550 UART IE_IRQ3
33 * 22 - VIA southbridge PIC IE_IRQ4
34 * 23 - unused IE_IRQ5
35 *
36 * The VIA chip is a master/slave 8259 setup and has the following interrupts:
37 *
38 * 8 - RTC
39 * 9 - PCI
40 * 14 - IDE0
41 * 15 - IDE1
42 */
43
44static inline void galileo_irq(void)
45{
46 unsigned int mask, pending, devfn;
47
48 mask = GT_READ(GT_INTRMASK_OFS);
49 pending = GT_READ(GT_INTRCAUSE_OFS) & mask;
50
51 if (pending & GT_INTR_T0EXP_MSK) {
52 GT_WRITE(GT_INTRCAUSE_OFS, ~GT_INTR_T0EXP_MSK);
53 do_IRQ(COBALT_GALILEO_IRQ);
54 } else if (pending & GT_INTR_RETRYCTR0_MSK) {
55 devfn = GT_READ(GT_PCI0_CFGADDR_OFS) >> 8;
56 GT_WRITE(GT_INTRCAUSE_OFS, ~GT_INTR_RETRYCTR0_MSK);
57 printk(KERN_WARNING
58 "Galileo: PCI retry count exceeded (%02x.%u)\n",
59 PCI_SLOT(devfn), PCI_FUNC(devfn));
60 } else {
61 GT_WRITE(GT_INTRMASK_OFS, mask & ~pending);
62 printk(KERN_WARNING
63 "Galileo: masking unexpected interrupt %08x\n", pending);
64 }
65}
66
67static inline void via_pic_irq(void)
68{
69 int irq;
70
71 irq = i8259_irq();
72 if (irq >= 0)
73 do_IRQ(irq);
74}
75 22
76asmlinkage void plat_irq_dispatch(void) 23asmlinkage void plat_irq_dispatch(void)
77{ 24{
78 unsigned pending = read_c0_status() & read_c0_cause(); 25 unsigned pending = read_c0_status() & read_c0_cause() & ST0_IM;
26 int irq;
79 27
80 if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */ 28 if (pending & CAUSEF_IP2)
81 galileo_irq(); 29 gt641xx_irq_dispatch();
82 else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */ 30 else if (pending & CAUSEF_IP6) {
83 via_pic_irq(); 31 irq = i8259_irq();
84 else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */ 32 if (irq < 0)
85 do_IRQ(COBALT_CPU_IRQ + 3); 33 spurious_interrupt();
86 else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */ 34 else
87 do_IRQ(COBALT_CPU_IRQ + 4); 35 do_IRQ(irq);
88 else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */ 36 } else if (pending & CAUSEF_IP3)
89 do_IRQ(COBALT_CPU_IRQ + 5); 37 do_IRQ(MIPS_CPU_IRQ_BASE + 3);
90 else if (pending & CAUSEF_IP7) /* IRQ 23 */ 38 else if (pending & CAUSEF_IP4)
91 do_IRQ(COBALT_CPU_IRQ + 7); 39 do_IRQ(MIPS_CPU_IRQ_BASE + 4);
40 else if (pending & CAUSEF_IP5)
41 do_IRQ(MIPS_CPU_IRQ_BASE + 5);
42 else if (pending & CAUSEF_IP7)
43 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
44 else
45 spurious_interrupt();
92} 46}
93 47
94static struct irqaction irq_via = { 48static struct irqaction cascade = {
95 no_action, 0, { { 0, } }, "cascade", NULL, NULL 49 .handler = no_action,
50 .mask = CPU_MASK_NONE,
51 .name = "cascade",
96}; 52};
97 53
98void __init arch_init_irq(void) 54void __init arch_init_irq(void)
99{ 55{
100 /* 56 mips_cpu_irq_init();
101 * Mask all Galileo interrupts. The Galileo 57 gt641xx_irq_init();
102 * handler is set in cobalt_timer_setup() 58 init_i8259_irqs();
103 */
104 GT_WRITE(GT_INTRMASK_OFS, 0);
105
106 init_i8259_irqs(); /* 0 ... 15 */
107 mips_cpu_irq_init(); /* 16 ... 23 */
108
109 /*
110 * Mask all cpu interrupts
111 * (except IE4, we already masked those at VIA level)
112 */
113 change_c0_status(ST0_IM, IE_IRQ4);
114 59
115 setup_irq(COBALT_VIA_IRQ, &irq_via); 60 setup_irq(GT641XX_CASCADE_IRQ, &cascade);
61 setup_irq(I8259_CASCADE_IRQ, &cascade);
116} 62}
diff --git a/arch/mips/cobalt/led.c b/arch/mips/cobalt/led.c
new file mode 100644
index 000000000000..1c6ebd468b07
--- /dev/null
+++ b/arch/mips/cobalt/led.c
@@ -0,0 +1,62 @@
1/*
2 * Registration of Cobalt LED platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24
25#include <cobalt.h>
26
27static struct resource cobalt_led_resource __initdata = {
28 .start = 0x1c000000,
29 .end = 0x1c000000,
30 .flags = IORESOURCE_MEM,
31};
32
33static __init int cobalt_led_add(void)
34{
35 struct platform_device *pdev;
36 int retval;
37
38 if (cobalt_board_id == COBALT_BRD_ID_QUBE1 ||
39 cobalt_board_id == COBALT_BRD_ID_QUBE2)
40 pdev = platform_device_alloc("cobalt-qube-leds", -1);
41 else
42 pdev = platform_device_alloc("cobalt-raq-leds", -1);
43
44 if (!pdev)
45 return -ENOMEM;
46
47 retval = platform_device_add_resources(pdev, &cobalt_led_resource, 1);
48 if (retval)
49 goto err_free_device;
50
51 retval = platform_device_add(pdev);
52 if (retval)
53 goto err_free_device;
54
55 return 0;
56
57err_free_device:
58 platform_device_put(pdev);
59
60 return retval;
61}
62device_initcall(cobalt_led_add);
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 43cca21fdbc0..71eb4ccc4bc1 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -8,36 +8,46 @@
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle 8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv) 9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 */ 10 */
11#include <linux/init.h>
12#include <linux/io.h>
11#include <linux/jiffies.h> 13#include <linux/jiffies.h>
12 14#include <linux/leds.h>
13#include <asm/io.h>
14#include <asm/reboot.h>
15 15
16#include <cobalt.h> 16#include <cobalt.h>
17 17
18#define RESET_PORT ((void __iomem *)CKSEG1ADDR(0x1c000000))
19#define RESET 0x0f
20
21DEFINE_LED_TRIGGER(power_off_led_trigger);
22
23static int __init ledtrig_power_off_init(void)
24{
25 led_trigger_register_simple("power-off", &power_off_led_trigger);
26 return 0;
27}
28device_initcall(ledtrig_power_off_init);
29
18void cobalt_machine_halt(void) 30void cobalt_machine_halt(void)
19{ 31{
20 int state, last, diff; 32 int state, last, diff;
21 unsigned long mark; 33 unsigned long mark;
22 34
23 /* 35 /*
24 * turn off bar on Qube, flash power off LED on RaQ (0.5Hz) 36 * turn on power off LED on RaQ
25 * 37 *
26 * restart if ENTER and SELECT are pressed 38 * restart if ENTER and SELECT are pressed
27 */ 39 */
28 40
29 last = COBALT_KEY_PORT; 41 last = COBALT_KEY_PORT;
30 42
31 for (state = 0;;) { 43 led_trigger_event(power_off_led_trigger, LED_FULL);
32
33 state ^= COBALT_LED_POWER_OFF;
34 COBALT_LED_PORT = state;
35 44
45 for (state = 0;;) {
36 diff = COBALT_KEY_PORT ^ last; 46 diff = COBALT_KEY_PORT ^ last;
37 last ^= diff; 47 last ^= diff;
38 48
39 if((diff & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)) && !(~last & (COBALT_KEY_ENTER | COBALT_KEY_SELECT))) 49 if((diff & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)) && !(~last & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)))
40 COBALT_LED_PORT = COBALT_LED_RESET; 50 writeb(RESET, RESET_PORT);
41 51
42 for (mark = jiffies; jiffies - mark < HZ;) 52 for (mark = jiffies; jiffies - mark < HZ;)
43 ; 53 ;
@@ -46,17 +56,8 @@ void cobalt_machine_halt(void)
46 56
47void cobalt_machine_restart(char *command) 57void cobalt_machine_restart(char *command)
48{ 58{
49 COBALT_LED_PORT = COBALT_LED_RESET; 59 writeb(RESET, RESET_PORT);
50 60
51 /* we should never get here */ 61 /* we should never get here */
52 cobalt_machine_halt(); 62 cobalt_machine_halt();
53} 63}
54
55/*
56 * This triggers the luser mode device driver for the power switch ;-)
57 */
58void cobalt_machine_power_off(void)
59{
60 printk("You can switch the machine off now.\n");
61 cobalt_machine_halt();
62}
diff --git a/arch/mips/cobalt/rtc.c b/arch/mips/cobalt/rtc.c
index 284daefc5c55..e70794b8bcba 100644
--- a/arch/mips/cobalt/rtc.c
+++ b/arch/mips/cobalt/rtc.c
@@ -20,6 +20,7 @@
20#include <linux/errno.h> 20#include <linux/errno.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23#include <linux/mc146818rtc.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24 25
25static struct resource cobalt_rtc_resource[] __initdata = { 26static struct resource cobalt_rtc_resource[] __initdata = {
@@ -29,8 +30,8 @@ static struct resource cobalt_rtc_resource[] __initdata = {
29 .flags = IORESOURCE_IO, 30 .flags = IORESOURCE_IO,
30 }, 31 },
31 { 32 {
32 .start = 8, 33 .start = RTC_IRQ,
33 .end = 8, 34 .end = RTC_IRQ,
34 .flags = IORESOURCE_IRQ, 35 .flags = IORESOURCE_IRQ,
35 }, 36 },
36}; 37};
diff --git a/arch/mips/cobalt/serial.c b/arch/mips/cobalt/serial.c
index 08e739704cc9..53b8d0d6da90 100644
--- a/arch/mips/cobalt/serial.c
+++ b/arch/mips/cobalt/serial.c
@@ -24,6 +24,7 @@
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25 25
26#include <cobalt.h> 26#include <cobalt.h>
27#include <irq.h>
27 28
28static struct resource cobalt_uart_resource[] __initdata = { 29static struct resource cobalt_uart_resource[] __initdata = {
29 { 30 {
@@ -32,15 +33,15 @@ static struct resource cobalt_uart_resource[] __initdata = {
32 .flags = IORESOURCE_MEM, 33 .flags = IORESOURCE_MEM,
33 }, 34 },
34 { 35 {
35 .start = COBALT_SERIAL_IRQ, 36 .start = SERIAL_IRQ,
36 .end = COBALT_SERIAL_IRQ, 37 .end = SERIAL_IRQ,
37 .flags = IORESOURCE_IRQ, 38 .flags = IORESOURCE_IRQ,
38 }, 39 },
39}; 40};
40 41
41static struct plat_serial8250_port cobalt_serial8250_port[] = { 42static struct plat_serial8250_port cobalt_serial8250_port[] = {
42 { 43 {
43 .irq = COBALT_SERIAL_IRQ, 44 .irq = SERIAL_IRQ,
44 .uartclk = 18432000, 45 .uartclk = 18432000,
45 .iotype = UPIO_MEM, 46 .iotype = UPIO_MEM,
46 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 47 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 7abe45e78425..d11bb1bc7b6b 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -15,15 +15,16 @@
15 15
16#include <asm/bootinfo.h> 16#include <asm/bootinfo.h>
17#include <asm/time.h> 17#include <asm/time.h>
18#include <asm/i8253.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/reboot.h> 20#include <asm/reboot.h>
20#include <asm/gt64120.h> 21#include <asm/gt64120.h>
21 22
22#include <cobalt.h> 23#include <cobalt.h>
24#include <irq.h>
23 25
24extern void cobalt_machine_restart(char *command); 26extern void cobalt_machine_restart(char *command);
25extern void cobalt_machine_halt(void); 27extern void cobalt_machine_halt(void);
26extern void cobalt_machine_power_off(void);
27 28
28const char *get_system_type(void) 29const char *get_system_type(void)
29{ 30{
@@ -45,14 +46,10 @@ void __init plat_timer_setup(struct irqaction *irq)
45 /* Load timer value for HZ (TCLK is 50MHz) */ 46 /* Load timer value for HZ (TCLK is 50MHz) */
46 GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ); 47 GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ);
47 48
48 /* Enable timer */ 49 /* Enable timer0 */
49 GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); 50 GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
50 51
51 /* Register interrupt */ 52 setup_irq(GT641XX_TIMER0_IRQ, irq);
52 setup_irq(COBALT_GALILEO_IRQ, irq);
53
54 /* Enable interrupt */
55 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
56} 53}
57 54
58/* 55/*
@@ -87,13 +84,18 @@ static struct resource cobalt_reserved_resources[] = {
87 }, 84 },
88}; 85};
89 86
87void __init plat_time_init(void)
88{
89 setup_pit_timer();
90}
91
90void __init plat_mem_setup(void) 92void __init plat_mem_setup(void)
91{ 93{
92 int i; 94 int i;
93 95
94 _machine_restart = cobalt_machine_restart; 96 _machine_restart = cobalt_machine_restart;
95 _machine_halt = cobalt_machine_halt; 97 _machine_halt = cobalt_machine_halt;
96 pm_power_off = cobalt_machine_power_off; 98 pm_power_off = cobalt_machine_halt;
97 99
98 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); 100 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
99 101
@@ -117,8 +119,6 @@ void __init prom_init(void)
117 unsigned long memsz; 119 unsigned long memsz;
118 char **argv; 120 char **argv;
119 121
120 mips_machgroup = MACH_GROUP_COBALT;
121
122 memsz = fw_arg0 & 0x7fff0000; 122 memsz = fw_arg0 & 0x7fff0000;
123 narg = fw_arg0 & 0x0000ffff; 123 narg = fw_arg0 & 0x0000ffff;
124 124