diff options
author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2013-07-25 13:26:48 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-08-26 09:31:54 -0400 |
commit | d8b74276f5488d64ebb28d77631b536f1c5de6d2 (patch) | |
tree | 14d0ab528fbb73443ae94b9ab84700c78936c067 /arch/mips/cavium-octeon | |
parent | 83eefabf9b596b8237cdcc385bff67f70d1e5a2d (diff) |
MIPS: cavium-octeon: fix I/O space setup on non-PCI systems
Fix I/O space setup, so that on non-PCI systems using inb()/outb()
won't crash the system. Some drivers may try to probe I/O space and for
that purpose we can just allocate some normal memory initially. Drivers
trying to reserve a region will fail early as we set the size to 0. If
a real I/O space is present, the PCI/PCIe support code will re-adjust
the values accordingly.
Tested with EdgeRouter Lite by enabling CONFIG_SERIO_I8042 that caused
the originally reported crash.
Reported-by: Faidon Liambotis <paravoid@debian.org>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5626/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r-- | arch/mips/cavium-octeon/setup.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 48b08eb9d9e4..b212ae12e5ac 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c | |||
@@ -8,6 +8,7 @@ | |||
8 | * written by Ralf Baechle <ralf@linux-mips.org> | 8 | * written by Ralf Baechle <ralf@linux-mips.org> |
9 | */ | 9 | */ |
10 | #include <linux/compiler.h> | 10 | #include <linux/compiler.h> |
11 | #include <linux/vmalloc.h> | ||
11 | #include <linux/init.h> | 12 | #include <linux/init.h> |
12 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
13 | #include <linux/console.h> | 14 | #include <linux/console.h> |
@@ -1139,3 +1140,30 @@ static int __init edac_devinit(void) | |||
1139 | return err; | 1140 | return err; |
1140 | } | 1141 | } |
1141 | device_initcall(edac_devinit); | 1142 | device_initcall(edac_devinit); |
1143 | |||
1144 | static void __initdata *octeon_dummy_iospace; | ||
1145 | |||
1146 | static int __init octeon_no_pci_init(void) | ||
1147 | { | ||
1148 | /* | ||
1149 | * Initially assume there is no PCI. The PCI/PCIe platform code will | ||
1150 | * later re-initialize these to correct values if they are present. | ||
1151 | */ | ||
1152 | octeon_dummy_iospace = vzalloc(IO_SPACE_LIMIT); | ||
1153 | set_io_port_base((unsigned long)octeon_dummy_iospace); | ||
1154 | ioport_resource.start = MAX_RESOURCE; | ||
1155 | ioport_resource.end = 0; | ||
1156 | return 0; | ||
1157 | } | ||
1158 | core_initcall(octeon_no_pci_init); | ||
1159 | |||
1160 | static int __init octeon_no_pci_release(void) | ||
1161 | { | ||
1162 | /* | ||
1163 | * Release the allocated memory if a real IO space is there. | ||
1164 | */ | ||
1165 | if ((unsigned long)octeon_dummy_iospace != mips_io_port_base) | ||
1166 | vfree(octeon_dummy_iospace); | ||
1167 | return 0; | ||
1168 | } | ||
1169 | late_initcall(octeon_no_pci_release); | ||