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authorAaro Koskinen <aaro.koskinen@iki.fi>2013-06-23 16:38:44 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-07-01 09:10:56 -0400
commita135a9b5d9683ace787c7d86f1e642d9acfacdde (patch)
tree2965c7e97a65f81adbce72ce98d3df230213dcc8 /arch/mips/cavium-octeon
parent6ba045f9fbdafb48da42aa8576ea7a3980443136 (diff)
MIPS: Octeon: Enable interfaces on EdgeRouter Lite
Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig and busybox shell. DHCP & ping works with eth0, eth1 and eth2. The board type "UBNT_E100" is taken from the sources of the vendor kernel shipped with the product. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5546/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-helper-board.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
index 7c6497781895..0a1283ce47f5 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
@@ -181,6 +181,11 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
181 return ipd_port - 16 + 4; 181 return ipd_port - 16 + 4;
182 else 182 else
183 return -1; 183 return -1;
184 case CVMX_BOARD_TYPE_UBNT_E100:
185 if (ipd_port >= 0 && ipd_port <= 2)
186 return 7 - ipd_port;
187 else
188 return -1;
184 } 189 }
185 190
186 /* Some unknown board. Somebody forgot to update this function... */ 191 /* Some unknown board. Somebody forgot to update this function... */
@@ -706,6 +711,14 @@ int __cvmx_helper_board_hardware_enable(int interface)
706 } 711 }
707 } 712 }
708 } 713 }
714 } else if (cvmx_sysinfo_get()->board_type ==
715 CVMX_BOARD_TYPE_UBNT_E100) {
716 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0);
717 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10);
718 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
719 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10);
720 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(2, interface), 0);
721 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(2, interface), 0x10);
709 } 722 }
710 return 0; 723 return 0;
711} 724}