aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/cavium-octeon
diff options
context:
space:
mode:
authorAaro Koskinen <aaro.koskinen@iki.fi>2014-12-21 15:53:59 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2014-12-23 16:14:22 -0500
commit1e585ef51c3fdcf296d2ce5cb8c9e74b1a36cfb4 (patch)
treea2183c1fe56d921203be0adb63281bc8c0011ba2 /arch/mips/cavium-octeon
parentf421258d5bf883b68b1cdaa299a8a1da3eb92e0f (diff)
crypto: octeon - add instruction definitions for MD5
Add instruction definitions for MD5. Based on information extracted from EdgeRouter Pro GPL source tarball. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/crypto/octeon-crypto.h56
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/crypto/octeon-crypto.h b/arch/mips/cavium-octeon/crypto/octeon-crypto.h
index 5ca86d4ead52..3f65bc6ccb83 100644
--- a/arch/mips/cavium-octeon/crypto/octeon-crypto.h
+++ b/arch/mips/cavium-octeon/crypto/octeon-crypto.h
@@ -4,14 +4,70 @@
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2012-2013 Cavium Inc., All Rights Reserved. 6 * Copyright (C) 2012-2013 Cavium Inc., All Rights Reserved.
7 *
8 * MD5 instruction definitions added by Aaro Koskinen <aaro.koskinen@iki.fi>.
9 *
7 */ 10 */
8#ifndef __LINUX_OCTEON_CRYPTO_H 11#ifndef __LINUX_OCTEON_CRYPTO_H
9#define __LINUX_OCTEON_CRYPTO_H 12#define __LINUX_OCTEON_CRYPTO_H
10 13
11#include <linux/sched.h> 14#include <linux/sched.h>
15#include <asm/mipsregs.h>
12 16
13extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state); 17extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state);
14extern void octeon_crypto_disable(struct octeon_cop2_state *state, 18extern void octeon_crypto_disable(struct octeon_cop2_state *state,
15 unsigned long flags); 19 unsigned long flags);
16 20
21/*
22 * Macros needed to implement MD5:
23 */
24
25/*
26 * The index can be 0-1.
27 */
28#define write_octeon_64bit_hash_dword(value, index) \
29do { \
30 __asm__ __volatile__ ( \
31 "dmtc2 %[rt],0x0048+" STR(index) \
32 : \
33 : [rt] "d" (value)); \
34} while (0)
35
36/*
37 * The index can be 0-1.
38 */
39#define read_octeon_64bit_hash_dword(index) \
40({ \
41 u64 __value; \
42 \
43 __asm__ __volatile__ ( \
44 "dmfc2 %[rt],0x0048+" STR(index) \
45 : [rt] "=d" (__value) \
46 : ); \
47 \
48 __value; \
49})
50
51/*
52 * The index can be 0-6.
53 */
54#define write_octeon_64bit_block_dword(value, index) \
55do { \
56 __asm__ __volatile__ ( \
57 "dmtc2 %[rt],0x0040+" STR(index) \
58 : \
59 : [rt] "d" (value)); \
60} while (0)
61
62/*
63 * The value is the final block dword (64-bit).
64 */
65#define octeon_md5_start(value) \
66do { \
67 __asm__ __volatile__ ( \
68 "dmtc2 %[rt],0x4047" \
69 : \
70 : [rt] "d" (value)); \
71} while (0)
72
17#endif /* __LINUX_OCTEON_CRYPTO_H */ 73#endif /* __LINUX_OCTEON_CRYPTO_H */