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authorPaul Gortmaker <paul.gortmaker@windriver.com>2013-06-18 09:38:59 -0400
committerPaul Gortmaker <paul.gortmaker@windriver.com>2013-07-14 19:36:51 -0400
commit078a55fc824c1633b3a507e4ad48b4637c1dfc18 (patch)
treeb7abb8d50bf6e322baaea322e9224d7715b52f5b /arch/mips/cavium-octeon
parent60ffef065dd40b91f6f76af6c7510ddf23102f54 (diff)
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/octeon-irq.c12
-rw-r--r--arch/mips/cavium-octeon/smp.c6
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 7181def6037a..9d36774bded1 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -1095,7 +1095,7 @@ static void octeon_irq_ip3_ciu(void)
1095 1095
1096static bool octeon_irq_use_ip4; 1096static bool octeon_irq_use_ip4;
1097 1097
1098static void __cpuinit octeon_irq_local_enable_ip4(void *arg) 1098static void octeon_irq_local_enable_ip4(void *arg)
1099{ 1099{
1100 set_c0_status(STATUSF_IP4); 1100 set_c0_status(STATUSF_IP4);
1101} 1101}
@@ -1110,21 +1110,21 @@ static void (*octeon_irq_ip2)(void);
1110static void (*octeon_irq_ip3)(void); 1110static void (*octeon_irq_ip3)(void);
1111static void (*octeon_irq_ip4)(void); 1111static void (*octeon_irq_ip4)(void);
1112 1112
1113void __cpuinitdata (*octeon_irq_setup_secondary)(void); 1113void (*octeon_irq_setup_secondary)(void);
1114 1114
1115void __cpuinit octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h) 1115void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h)
1116{ 1116{
1117 octeon_irq_ip4 = h; 1117 octeon_irq_ip4 = h;
1118 octeon_irq_use_ip4 = true; 1118 octeon_irq_use_ip4 = true;
1119 on_each_cpu(octeon_irq_local_enable_ip4, NULL, 1); 1119 on_each_cpu(octeon_irq_local_enable_ip4, NULL, 1);
1120} 1120}
1121 1121
1122static void __cpuinit octeon_irq_percpu_enable(void) 1122static void octeon_irq_percpu_enable(void)
1123{ 1123{
1124 irq_cpu_online(); 1124 irq_cpu_online();
1125} 1125}
1126 1126
1127static void __cpuinit octeon_irq_init_ciu_percpu(void) 1127static void octeon_irq_init_ciu_percpu(void)
1128{ 1128{
1129 int coreid = cvmx_get_core_num(); 1129 int coreid = cvmx_get_core_num();
1130 1130
@@ -1167,7 +1167,7 @@ static void octeon_irq_init_ciu2_percpu(void)
1167 cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP2(coreid)); 1167 cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP2(coreid));
1168} 1168}
1169 1169
1170static void __cpuinit octeon_irq_setup_secondary_ciu(void) 1170static void octeon_irq_setup_secondary_ciu(void)
1171{ 1171{
1172 octeon_irq_init_ciu_percpu(); 1172 octeon_irq_init_ciu_percpu();
1173 octeon_irq_percpu_enable(); 1173 octeon_irq_percpu_enable();
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 295137dfdc37..138cc80c5928 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -173,7 +173,7 @@ static void octeon_boot_secondary(int cpu, struct task_struct *idle)
173 * After we've done initial boot, this function is called to allow the 173 * After we've done initial boot, this function is called to allow the
174 * board code to clean up state, if needed 174 * board code to clean up state, if needed
175 */ 175 */
176static void __cpuinit octeon_init_secondary(void) 176static void octeon_init_secondary(void)
177{ 177{
178 unsigned int sr; 178 unsigned int sr;
179 179
@@ -375,7 +375,7 @@ static int octeon_update_boot_vector(unsigned int cpu)
375 return 0; 375 return 0;
376} 376}
377 377
378static int __cpuinit octeon_cpu_callback(struct notifier_block *nfb, 378static int octeon_cpu_callback(struct notifier_block *nfb,
379 unsigned long action, void *hcpu) 379 unsigned long action, void *hcpu)
380{ 380{
381 unsigned int cpu = (unsigned long)hcpu; 381 unsigned int cpu = (unsigned long)hcpu;
@@ -394,7 +394,7 @@ static int __cpuinit octeon_cpu_callback(struct notifier_block *nfb,
394 return NOTIFY_OK; 394 return NOTIFY_OK;
395} 395}
396 396
397static int __cpuinit register_cavium_notifier(void) 397static int register_cavium_notifier(void)
398{ 398{
399 hotcpu_notifier(octeon_cpu_callback, 0); 399 hotcpu_notifier(octeon_cpu_callback, 0);
400 return 0; 400 return 0;