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authorDavid Daney <ddaney@caviumnetworks.com>2010-05-19 17:16:32 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-05-21 16:31:23 -0400
commit606c958e2857d29106b8d3b2fc30e22f376c80c5 (patch)
treed5ea9847b33df34228570f36733bf2eadfae45b5 /arch/mips/cavium-octeon
parent1dd5216e80318b4cb25c1785f5d11a6f042f0a3b (diff)
MIPS: Octeon: Serial port fixes for OCTEON simulator.
For the simulator, fake a slow clock to get fast output. In prom_putchar we have to mask the value so the simulator doesn't ASSERT when printing non-ASCII characters. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1255/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/serial.c6
-rw-r--r--arch/mips/cavium-octeon/setup.c2
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/cavium-octeon/serial.c b/arch/mips/cavium-octeon/serial.c
index 8240728d485a..83eac37a1ff9 100644
--- a/arch/mips/cavium-octeon/serial.c
+++ b/arch/mips/cavium-octeon/serial.c
@@ -65,7 +65,11 @@ static void __init octeon_uart_set_common(struct plat_serial8250_port *p)
65 p->type = PORT_OCTEON; 65 p->type = PORT_OCTEON;
66 p->iotype = UPIO_MEM; 66 p->iotype = UPIO_MEM;
67 p->regshift = 3; /* I/O addresses are every 8 bytes */ 67 p->regshift = 3; /* I/O addresses are every 8 bytes */
68 p->uartclk = mips_hpt_frequency; 68 if (octeon_is_simulation())
69 /* Make simulator output fast*/
70 p->uartclk = 115200 * 16;
71 else
72 p->uartclk = mips_hpt_frequency;
69 p->serial_in = octeon_serial_in; 73 p->serial_in = octeon_serial_in;
70 p->serial_out = octeon_serial_out; 74 p->serial_out = octeon_serial_out;
71} 75}
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 44cb20cd3bdc..d1b5ffaf0281 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -702,7 +702,7 @@ int prom_putchar(char c)
702 } while ((lsrval & 0x20) == 0); 702 } while ((lsrval & 0x20) == 0);
703 703
704 /* Write the byte */ 704 /* Write the byte */
705 cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c); 705 cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull);
706 return 1; 706 return 1;
707} 707}
708 708