diff options
author | David Daney <ddaney@caviumnetworks.com> | 2009-09-16 17:54:18 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-09-17 14:07:52 -0400 |
commit | 512254ba8383c5dd7eca6819d0da1ce2fe9ede47 (patch) | |
tree | b2cd17a044a86e20393e6e07caadf4fecf1e870b /arch/mips/cavium-octeon/setup.c | |
parent | 2ca2ebfd952d0338a0972c1f1f56b9b0c1a3b09c (diff) |
MIPS: Octeon: Move some platform device registration to its own file.
There is a bunch of platform device registration in
arch/mips/cavium-octeon/setup.c. We move it to its own file in
preparation for adding more platform devices.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/setup.c')
-rw-r--r-- | arch/mips/cavium-octeon/setup.c | 146 |
1 files changed, 0 insertions, 146 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 468a1209833f..b321d3b16877 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/delay.h> | 11 | #include <linux/delay.h> |
12 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <linux/irq.h> | ||
15 | #include <linux/serial.h> | 14 | #include <linux/serial.h> |
16 | #include <linux/smp.h> | 15 | #include <linux/smp.h> |
17 | #include <linux/types.h> | 16 | #include <linux/types.h> |
@@ -33,7 +32,6 @@ | |||
33 | #include <asm/time.h> | 32 | #include <asm/time.h> |
34 | 33 | ||
35 | #include <asm/octeon/octeon.h> | 34 | #include <asm/octeon/octeon.h> |
36 | #include <asm/octeon/cvmx-rnm-defs.h> | ||
37 | 35 | ||
38 | #ifdef CONFIG_CAVIUM_DECODE_RSL | 36 | #ifdef CONFIG_CAVIUM_DECODE_RSL |
39 | extern void cvmx_interrupt_rsl_decode(void); | 37 | extern void cvmx_interrupt_rsl_decode(void); |
@@ -825,147 +823,3 @@ void prom_free_prom_memory(void) | |||
825 | CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */ | 823 | CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */ |
826 | octeon_hal_setup_reserved32(); | 824 | octeon_hal_setup_reserved32(); |
827 | } | 825 | } |
828 | |||
829 | static struct octeon_cf_data octeon_cf_data; | ||
830 | |||
831 | static int __init octeon_cf_device_init(void) | ||
832 | { | ||
833 | union cvmx_mio_boot_reg_cfgx mio_boot_reg_cfg; | ||
834 | unsigned long base_ptr, region_base, region_size; | ||
835 | struct platform_device *pd; | ||
836 | struct resource cf_resources[3]; | ||
837 | unsigned int num_resources; | ||
838 | int i; | ||
839 | int ret = 0; | ||
840 | |||
841 | /* Setup octeon-cf platform device if present. */ | ||
842 | base_ptr = 0; | ||
843 | if (octeon_bootinfo->major_version == 1 | ||
844 | && octeon_bootinfo->minor_version >= 1) { | ||
845 | if (octeon_bootinfo->compact_flash_common_base_addr) | ||
846 | base_ptr = | ||
847 | octeon_bootinfo->compact_flash_common_base_addr; | ||
848 | } else { | ||
849 | base_ptr = 0x1d000800; | ||
850 | } | ||
851 | |||
852 | if (!base_ptr) | ||
853 | return ret; | ||
854 | |||
855 | /* Find CS0 region. */ | ||
856 | for (i = 0; i < 8; i++) { | ||
857 | mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i)); | ||
858 | region_base = mio_boot_reg_cfg.s.base << 16; | ||
859 | region_size = (mio_boot_reg_cfg.s.size + 1) << 16; | ||
860 | if (mio_boot_reg_cfg.s.en && base_ptr >= region_base | ||
861 | && base_ptr < region_base + region_size) | ||
862 | break; | ||
863 | } | ||
864 | if (i >= 7) { | ||
865 | /* i and i + 1 are CS0 and CS1, both must be less than 8. */ | ||
866 | goto out; | ||
867 | } | ||
868 | octeon_cf_data.base_region = i; | ||
869 | octeon_cf_data.is16bit = mio_boot_reg_cfg.s.width; | ||
870 | octeon_cf_data.base_region_bias = base_ptr - region_base; | ||
871 | memset(cf_resources, 0, sizeof(cf_resources)); | ||
872 | num_resources = 0; | ||
873 | cf_resources[num_resources].flags = IORESOURCE_MEM; | ||
874 | cf_resources[num_resources].start = region_base; | ||
875 | cf_resources[num_resources].end = region_base + region_size - 1; | ||
876 | num_resources++; | ||
877 | |||
878 | |||
879 | if (!(base_ptr & 0xfffful)) { | ||
880 | /* | ||
881 | * Boot loader signals availability of DMA (true_ide | ||
882 | * mode) by setting low order bits of base_ptr to | ||
883 | * zero. | ||
884 | */ | ||
885 | |||
886 | /* Asume that CS1 immediately follows. */ | ||
887 | mio_boot_reg_cfg.u64 = | ||
888 | cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1)); | ||
889 | region_base = mio_boot_reg_cfg.s.base << 16; | ||
890 | region_size = (mio_boot_reg_cfg.s.size + 1) << 16; | ||
891 | if (!mio_boot_reg_cfg.s.en) | ||
892 | goto out; | ||
893 | |||
894 | cf_resources[num_resources].flags = IORESOURCE_MEM; | ||
895 | cf_resources[num_resources].start = region_base; | ||
896 | cf_resources[num_resources].end = region_base + region_size - 1; | ||
897 | num_resources++; | ||
898 | |||
899 | octeon_cf_data.dma_engine = 0; | ||
900 | cf_resources[num_resources].flags = IORESOURCE_IRQ; | ||
901 | cf_resources[num_resources].start = OCTEON_IRQ_BOOTDMA; | ||
902 | cf_resources[num_resources].end = OCTEON_IRQ_BOOTDMA; | ||
903 | num_resources++; | ||
904 | } else { | ||
905 | octeon_cf_data.dma_engine = -1; | ||
906 | } | ||
907 | |||
908 | pd = platform_device_alloc("pata_octeon_cf", -1); | ||
909 | if (!pd) { | ||
910 | ret = -ENOMEM; | ||
911 | goto out; | ||
912 | } | ||
913 | pd->dev.platform_data = &octeon_cf_data; | ||
914 | |||
915 | ret = platform_device_add_resources(pd, cf_resources, num_resources); | ||
916 | if (ret) | ||
917 | goto fail; | ||
918 | |||
919 | ret = platform_device_add(pd); | ||
920 | if (ret) | ||
921 | goto fail; | ||
922 | |||
923 | return ret; | ||
924 | fail: | ||
925 | platform_device_put(pd); | ||
926 | out: | ||
927 | return ret; | ||
928 | } | ||
929 | device_initcall(octeon_cf_device_init); | ||
930 | |||
931 | /* Octeon Random Number Generator. */ | ||
932 | static int __init octeon_rng_device_init(void) | ||
933 | { | ||
934 | struct platform_device *pd; | ||
935 | int ret = 0; | ||
936 | |||
937 | struct resource rng_resources[] = { | ||
938 | { | ||
939 | .flags = IORESOURCE_MEM, | ||
940 | .start = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS), | ||
941 | .end = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf | ||
942 | }, { | ||
943 | .flags = IORESOURCE_MEM, | ||
944 | .start = cvmx_build_io_address(8, 0), | ||
945 | .end = cvmx_build_io_address(8, 0) + 0x7 | ||
946 | } | ||
947 | }; | ||
948 | |||
949 | pd = platform_device_alloc("octeon_rng", -1); | ||
950 | if (!pd) { | ||
951 | ret = -ENOMEM; | ||
952 | goto out; | ||
953 | } | ||
954 | |||
955 | ret = platform_device_add_resources(pd, rng_resources, | ||
956 | ARRAY_SIZE(rng_resources)); | ||
957 | if (ret) | ||
958 | goto fail; | ||
959 | |||
960 | ret = platform_device_add(pd); | ||
961 | if (ret) | ||
962 | goto fail; | ||
963 | |||
964 | return ret; | ||
965 | fail: | ||
966 | platform_device_put(pd); | ||
967 | |||
968 | out: | ||
969 | return ret; | ||
970 | } | ||
971 | device_initcall(octeon_rng_device_init); | ||