MIPS: Octeon: HOTPLUG_CPU fixes.

* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr.

* Convert calls to cvmx_read64_uint32(), to simple pointer
  dereferences.

* Set proper ebase.

* Don't confuse coreid and cpu numbers.

* Try to maintain consistent bootloader coremask.

* Update the signature and boot_init_vector of supported bootloaders.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1491/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 9 insertions, 7 deletions

diff --git a/arch/mips/cavium-octeon/octeon_boot.h b/arch/mips/cavium-octeon/octeon_boot.h
index 0f7f84accf9a..428864b2ba41 100644
--- a/arch/mips/cavium-octeon/octeon_boot.h
+++ b/arch/mips/cavium-octeon/octeon_boot.h
@@ -23,14 +23,16 @@
 #include <linux/types.h>
 
 struct boot_init_vector {
-        uint32_t stack_addr;
-        uint32_t code_addr;
+        /* First stage address - in ram instead of flash */
+        uint64_t code_addr;
+        /* Setup code for application, NOT application entry point */
         uint32_t app_start_func_addr;
+        /* k0 is used for global data - needs to be passed to other cores */
         uint32_t k0_val;
-        uint32_t flags;
-        uint32_t boot_info_addr;
+        /* Address of boot info block structure */
+        uint64_t boot_info_addr;
+        uint32_t flags;         /* flags */
         uint32_t pad;
-        uint32_t pad2;
 };
 
 /* similar to bootloader's linux_app_boot_info but without global data */
@@ -40,7 +42,7 @@ struct linux_app_boot_info {
         uint32_t avail_coremask;
         uint32_t pci_console_active;
         uint32_t icache_prefetch_disable;
-        uint32_t InitTLBStart_addr;
+        uint64_t InitTLBStart_addr;
         uint32_t start_app_addr;
         uint32_t cur_exception_base;
         uint32_t no_mark_private_data;
@@ -58,7 +60,7 @@ struct linux_app_boot_info {
 
 #define LINUX_APP_BOOT_BLOCK_NAME "linux-app-boot"
 
-#define LABI_SIGNATURE 0xAABBCCDD
+#define LABI_SIGNATURE 0xAABBCC01
 
 /*  from uboot-headers/octeon_mem_map.h */
 #define EXCEPTION_BASE_INCR     (4 * 1024)