diff options
author | Maxime Bizon <mbizon@freebox.fr> | 2010-01-30 12:34:55 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-04-12 12:26:18 -0400 |
commit | 524ef29cff593ab6635cda2a17b331bede58a396 (patch) | |
tree | d8d6a09c2f77e755f69f204e2467589491f5e36e /arch/mips/bcm63xx | |
parent | 97befcf4f0f42b1644b4b164ddc363685546edcd (diff) |
MIPS: BCM63xx: Add support for second uart.
The BCm63xx SOC has two uarts. Some boards use the second one for
bluetooth. This patch changes platform device registration code to
handle this. Changes to the UART driver were already merged in
6a2c7eabfd09ca7986bf96b8958a87ca041a19d8.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/900/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r-- | arch/mips/bcm63xx/boards/board_bcm963xx.c | 27 | ||||
-rw-r--r-- | arch/mips/bcm63xx/cpu.c | 5 | ||||
-rw-r--r-- | arch/mips/bcm63xx/dev-uart.c | 66 |
3 files changed, 79 insertions, 19 deletions
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c index a690afb4ee8d..8b0abcb4838e 100644 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/addrspace.h> | 18 | #include <asm/addrspace.h> |
19 | #include <bcm63xx_board.h> | 19 | #include <bcm63xx_board.h> |
20 | #include <bcm63xx_cpu.h> | 20 | #include <bcm63xx_cpu.h> |
21 | #include <bcm63xx_dev_uart.h> | ||
21 | #include <bcm63xx_regs.h> | 22 | #include <bcm63xx_regs.h> |
22 | #include <bcm63xx_io.h> | 23 | #include <bcm63xx_io.h> |
23 | #include <bcm63xx_dev_pci.h> | 24 | #include <bcm63xx_dev_pci.h> |
@@ -40,6 +41,7 @@ static struct board_info __initdata board_96338gw = { | |||
40 | .name = "96338GW", | 41 | .name = "96338GW", |
41 | .expected_cpu_id = 0x6338, | 42 | .expected_cpu_id = 0x6338, |
42 | 43 | ||
44 | .has_uart0 = 1, | ||
43 | .has_enet0 = 1, | 45 | .has_enet0 = 1, |
44 | .enet0 = { | 46 | .enet0 = { |
45 | .force_speed_100 = 1, | 47 | .force_speed_100 = 1, |
@@ -82,6 +84,7 @@ static struct board_info __initdata board_96338w = { | |||
82 | .name = "96338W", | 84 | .name = "96338W", |
83 | .expected_cpu_id = 0x6338, | 85 | .expected_cpu_id = 0x6338, |
84 | 86 | ||
87 | .has_uart0 = 1, | ||
85 | .has_enet0 = 1, | 88 | .has_enet0 = 1, |
86 | .enet0 = { | 89 | .enet0 = { |
87 | .force_speed_100 = 1, | 90 | .force_speed_100 = 1, |
@@ -126,6 +129,8 @@ static struct board_info __initdata board_96338w = { | |||
126 | static struct board_info __initdata board_96345gw2 = { | 129 | static struct board_info __initdata board_96345gw2 = { |
127 | .name = "96345GW2", | 130 | .name = "96345GW2", |
128 | .expected_cpu_id = 0x6345, | 131 | .expected_cpu_id = 0x6345, |
132 | |||
133 | .has_uart0 = 1, | ||
129 | }; | 134 | }; |
130 | #endif | 135 | #endif |
131 | 136 | ||
@@ -137,6 +142,7 @@ static struct board_info __initdata board_96348r = { | |||
137 | .name = "96348R", | 142 | .name = "96348R", |
138 | .expected_cpu_id = 0x6348, | 143 | .expected_cpu_id = 0x6348, |
139 | 144 | ||
145 | .has_uart0 = 1, | ||
140 | .has_enet0 = 1, | 146 | .has_enet0 = 1, |
141 | .has_pci = 1, | 147 | .has_pci = 1, |
142 | 148 | ||
@@ -180,6 +186,7 @@ static struct board_info __initdata board_96348gw_10 = { | |||
180 | .name = "96348GW-10", | 186 | .name = "96348GW-10", |
181 | .expected_cpu_id = 0x6348, | 187 | .expected_cpu_id = 0x6348, |
182 | 188 | ||
189 | .has_uart0 = 1, | ||
183 | .has_enet0 = 1, | 190 | .has_enet0 = 1, |
184 | .has_enet1 = 1, | 191 | .has_enet1 = 1, |
185 | .has_pci = 1, | 192 | .has_pci = 1, |
@@ -239,6 +246,7 @@ static struct board_info __initdata board_96348gw_11 = { | |||
239 | .name = "96348GW-11", | 246 | .name = "96348GW-11", |
240 | .expected_cpu_id = 0x6348, | 247 | .expected_cpu_id = 0x6348, |
241 | 248 | ||
249 | .has_uart0 = 1, | ||
242 | .has_enet0 = 1, | 250 | .has_enet0 = 1, |
243 | .has_enet1 = 1, | 251 | .has_enet1 = 1, |
244 | .has_pci = 1, | 252 | .has_pci = 1, |
@@ -292,6 +300,7 @@ static struct board_info __initdata board_96348gw = { | |||
292 | .name = "96348GW", | 300 | .name = "96348GW", |
293 | .expected_cpu_id = 0x6348, | 301 | .expected_cpu_id = 0x6348, |
294 | 302 | ||
303 | .has_uart0 = 1, | ||
295 | .has_enet0 = 1, | 304 | .has_enet0 = 1, |
296 | .has_enet1 = 1, | 305 | .has_enet1 = 1, |
297 | .has_pci = 1, | 306 | .has_pci = 1, |
@@ -349,9 +358,10 @@ static struct board_info __initdata board_FAST2404 = { | |||
349 | .name = "F@ST2404", | 358 | .name = "F@ST2404", |
350 | .expected_cpu_id = 0x6348, | 359 | .expected_cpu_id = 0x6348, |
351 | 360 | ||
352 | .has_enet0 = 1, | 361 | .has_uart0 = 1, |
353 | .has_enet1 = 1, | 362 | .has_enet0 = 1, |
354 | .has_pci = 1, | 363 | .has_enet1 = 1, |
364 | .has_pci = 1, | ||
355 | 365 | ||
356 | .enet0 = { | 366 | .enet0 = { |
357 | .has_phy = 1, | 367 | .has_phy = 1, |
@@ -391,6 +401,7 @@ static struct board_info __initdata board_DV201AMR = { | |||
391 | .name = "DV201AMR", | 401 | .name = "DV201AMR", |
392 | .expected_cpu_id = 0x6348, | 402 | .expected_cpu_id = 0x6348, |
393 | 403 | ||
404 | .has_uart0 = 1, | ||
394 | .has_pci = 1, | 405 | .has_pci = 1, |
395 | .has_ohci0 = 1, | 406 | .has_ohci0 = 1, |
396 | 407 | ||
@@ -410,6 +421,7 @@ static struct board_info __initdata board_96348gw_a = { | |||
410 | .name = "96348GW-A", | 421 | .name = "96348GW-A", |
411 | .expected_cpu_id = 0x6348, | 422 | .expected_cpu_id = 0x6348, |
412 | 423 | ||
424 | .has_uart0 = 1, | ||
413 | .has_enet0 = 1, | 425 | .has_enet0 = 1, |
414 | .has_enet1 = 1, | 426 | .has_enet1 = 1, |
415 | .has_pci = 1, | 427 | .has_pci = 1, |
@@ -435,6 +447,7 @@ static struct board_info __initdata board_96358vw = { | |||
435 | .name = "96358VW", | 447 | .name = "96358VW", |
436 | .expected_cpu_id = 0x6358, | 448 | .expected_cpu_id = 0x6358, |
437 | 449 | ||
450 | .has_uart0 = 1, | ||
438 | .has_enet0 = 1, | 451 | .has_enet0 = 1, |
439 | .has_enet1 = 1, | 452 | .has_enet1 = 1, |
440 | .has_pci = 1, | 453 | .has_pci = 1, |
@@ -486,6 +499,7 @@ static struct board_info __initdata board_96358vw2 = { | |||
486 | .name = "96358VW2", | 499 | .name = "96358VW2", |
487 | .expected_cpu_id = 0x6358, | 500 | .expected_cpu_id = 0x6358, |
488 | 501 | ||
502 | .has_uart0 = 1, | ||
489 | .has_enet0 = 1, | 503 | .has_enet0 = 1, |
490 | .has_enet1 = 1, | 504 | .has_enet1 = 1, |
491 | .has_pci = 1, | 505 | .has_pci = 1, |
@@ -533,6 +547,7 @@ static struct board_info __initdata board_AGPFS0 = { | |||
533 | .name = "AGPF-S0", | 547 | .name = "AGPF-S0", |
534 | .expected_cpu_id = 0x6358, | 548 | .expected_cpu_id = 0x6358, |
535 | 549 | ||
550 | .has_uart0 = 1, | ||
536 | .has_enet0 = 1, | 551 | .has_enet0 = 1, |
537 | .has_enet1 = 1, | 552 | .has_enet1 = 1, |
538 | .has_pci = 1, | 553 | .has_pci = 1, |
@@ -834,6 +849,12 @@ int __init board_register_devices(void) | |||
834 | { | 849 | { |
835 | u32 val; | 850 | u32 val; |
836 | 851 | ||
852 | if (board.has_uart0) | ||
853 | bcm63xx_uart_register(0); | ||
854 | |||
855 | if (board.has_uart1) | ||
856 | bcm63xx_uart_register(1); | ||
857 | |||
837 | if (board.has_pccard) | 858 | if (board.has_pccard) |
838 | bcm63xx_pcmcia_register(); | 859 | bcm63xx_pcmcia_register(); |
839 | 860 | ||
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c index 70378bb5e3f9..cbb7caf86d77 100644 --- a/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c | |||
@@ -36,6 +36,7 @@ static const unsigned long bcm96338_regs_base[] = { | |||
36 | [RSET_TIMER] = BCM_6338_TIMER_BASE, | 36 | [RSET_TIMER] = BCM_6338_TIMER_BASE, |
37 | [RSET_WDT] = BCM_6338_WDT_BASE, | 37 | [RSET_WDT] = BCM_6338_WDT_BASE, |
38 | [RSET_UART0] = BCM_6338_UART0_BASE, | 38 | [RSET_UART0] = BCM_6338_UART0_BASE, |
39 | [RSET_UART1] = BCM_6338_UART1_BASE, | ||
39 | [RSET_GPIO] = BCM_6338_GPIO_BASE, | 40 | [RSET_GPIO] = BCM_6338_GPIO_BASE, |
40 | [RSET_SPI] = BCM_6338_SPI_BASE, | 41 | [RSET_SPI] = BCM_6338_SPI_BASE, |
41 | [RSET_OHCI0] = BCM_6338_OHCI0_BASE, | 42 | [RSET_OHCI0] = BCM_6338_OHCI0_BASE, |
@@ -72,6 +73,7 @@ static const unsigned long bcm96345_regs_base[] = { | |||
72 | [RSET_TIMER] = BCM_6345_TIMER_BASE, | 73 | [RSET_TIMER] = BCM_6345_TIMER_BASE, |
73 | [RSET_WDT] = BCM_6345_WDT_BASE, | 74 | [RSET_WDT] = BCM_6345_WDT_BASE, |
74 | [RSET_UART0] = BCM_6345_UART0_BASE, | 75 | [RSET_UART0] = BCM_6345_UART0_BASE, |
76 | [RSET_UART1] = BCM_6345_UART1_BASE, | ||
75 | [RSET_GPIO] = BCM_6345_GPIO_BASE, | 77 | [RSET_GPIO] = BCM_6345_GPIO_BASE, |
76 | [RSET_SPI] = BCM_6345_SPI_BASE, | 78 | [RSET_SPI] = BCM_6345_SPI_BASE, |
77 | [RSET_UDC0] = BCM_6345_UDC0_BASE, | 79 | [RSET_UDC0] = BCM_6345_UDC0_BASE, |
@@ -109,6 +111,7 @@ static const unsigned long bcm96348_regs_base[] = { | |||
109 | [RSET_TIMER] = BCM_6348_TIMER_BASE, | 111 | [RSET_TIMER] = BCM_6348_TIMER_BASE, |
110 | [RSET_WDT] = BCM_6348_WDT_BASE, | 112 | [RSET_WDT] = BCM_6348_WDT_BASE, |
111 | [RSET_UART0] = BCM_6348_UART0_BASE, | 113 | [RSET_UART0] = BCM_6348_UART0_BASE, |
114 | [RSET_UART1] = BCM_6348_UART1_BASE, | ||
112 | [RSET_GPIO] = BCM_6348_GPIO_BASE, | 115 | [RSET_GPIO] = BCM_6348_GPIO_BASE, |
113 | [RSET_SPI] = BCM_6348_SPI_BASE, | 116 | [RSET_SPI] = BCM_6348_SPI_BASE, |
114 | [RSET_OHCI0] = BCM_6348_OHCI0_BASE, | 117 | [RSET_OHCI0] = BCM_6348_OHCI0_BASE, |
@@ -150,6 +153,7 @@ static const unsigned long bcm96358_regs_base[] = { | |||
150 | [RSET_TIMER] = BCM_6358_TIMER_BASE, | 153 | [RSET_TIMER] = BCM_6358_TIMER_BASE, |
151 | [RSET_WDT] = BCM_6358_WDT_BASE, | 154 | [RSET_WDT] = BCM_6358_WDT_BASE, |
152 | [RSET_UART0] = BCM_6358_UART0_BASE, | 155 | [RSET_UART0] = BCM_6358_UART0_BASE, |
156 | [RSET_UART1] = BCM_6358_UART1_BASE, | ||
153 | [RSET_GPIO] = BCM_6358_GPIO_BASE, | 157 | [RSET_GPIO] = BCM_6358_GPIO_BASE, |
154 | [RSET_SPI] = BCM_6358_SPI_BASE, | 158 | [RSET_SPI] = BCM_6358_SPI_BASE, |
155 | [RSET_OHCI0] = BCM_6358_OHCI0_BASE, | 159 | [RSET_OHCI0] = BCM_6358_OHCI0_BASE, |
@@ -170,6 +174,7 @@ static const unsigned long bcm96358_regs_base[] = { | |||
170 | static const int bcm96358_irqs[] = { | 174 | static const int bcm96358_irqs[] = { |
171 | [IRQ_TIMER] = BCM_6358_TIMER_IRQ, | 175 | [IRQ_TIMER] = BCM_6358_TIMER_IRQ, |
172 | [IRQ_UART0] = BCM_6358_UART0_IRQ, | 176 | [IRQ_UART0] = BCM_6358_UART0_IRQ, |
177 | [IRQ_UART1] = BCM_6358_UART1_IRQ, | ||
173 | [IRQ_DSL] = BCM_6358_DSL_IRQ, | 178 | [IRQ_DSL] = BCM_6358_DSL_IRQ, |
174 | [IRQ_ENET0] = BCM_6358_ENET0_IRQ, | 179 | [IRQ_ENET0] = BCM_6358_ENET0_IRQ, |
175 | [IRQ_ENET1] = BCM_6358_ENET1_IRQ, | 180 | [IRQ_ENET1] = BCM_6358_ENET1_IRQ, |
diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c index b0519461ad9b..c2963da0253e 100644 --- a/arch/mips/bcm63xx/dev-uart.c +++ b/arch/mips/bcm63xx/dev-uart.c | |||
@@ -11,31 +11,65 @@ | |||
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <bcm63xx_cpu.h> | 12 | #include <bcm63xx_cpu.h> |
13 | 13 | ||
14 | static struct resource uart_resources[] = { | 14 | static struct resource uart0_resources[] = { |
15 | { | 15 | { |
16 | .start = -1, /* filled at runtime */ | 16 | /* start & end filled at runtime */ |
17 | .end = -1, /* filled at runtime */ | ||
18 | .flags = IORESOURCE_MEM, | 17 | .flags = IORESOURCE_MEM, |
19 | }, | 18 | }, |
20 | { | 19 | { |
21 | .start = -1, /* filled at runtime */ | 20 | /* start filled at runtime */ |
22 | .flags = IORESOURCE_IRQ, | 21 | .flags = IORESOURCE_IRQ, |
23 | }, | 22 | }, |
24 | }; | 23 | }; |
25 | 24 | ||
26 | static struct platform_device bcm63xx_uart_device = { | 25 | static struct resource uart1_resources[] = { |
27 | .name = "bcm63xx_uart", | 26 | { |
28 | .id = 0, | 27 | /* start & end filled at runtime */ |
29 | .num_resources = ARRAY_SIZE(uart_resources), | 28 | .flags = IORESOURCE_MEM, |
30 | .resource = uart_resources, | 29 | }, |
30 | { | ||
31 | /* start filled at runtime */ | ||
32 | .flags = IORESOURCE_IRQ, | ||
33 | }, | ||
34 | }; | ||
35 | |||
36 | static struct platform_device bcm63xx_uart_devices[] = { | ||
37 | { | ||
38 | .name = "bcm63xx_uart", | ||
39 | .id = 0, | ||
40 | .num_resources = ARRAY_SIZE(uart0_resources), | ||
41 | .resource = uart0_resources, | ||
42 | }, | ||
43 | |||
44 | { | ||
45 | .name = "bcm63xx_uart", | ||
46 | .id = 1, | ||
47 | .num_resources = ARRAY_SIZE(uart1_resources), | ||
48 | .resource = uart1_resources, | ||
49 | } | ||
31 | }; | 50 | }; |
32 | 51 | ||
33 | int __init bcm63xx_uart_register(void) | 52 | int __init bcm63xx_uart_register(unsigned int id) |
34 | { | 53 | { |
35 | uart_resources[0].start = bcm63xx_regset_address(RSET_UART0); | 54 | if (id >= ARRAY_SIZE(bcm63xx_uart_devices)) |
36 | uart_resources[0].end = uart_resources[0].start; | 55 | return -ENODEV; |
37 | uart_resources[0].end += RSET_UART_SIZE - 1; | 56 | |
38 | uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); | 57 | if (id == 1 && !BCMCPU_IS_6358()) |
39 | return platform_device_register(&bcm63xx_uart_device); | 58 | return -ENODEV; |
59 | |||
60 | if (id == 0) { | ||
61 | uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0); | ||
62 | uart0_resources[0].end = uart0_resources[0].start + | ||
63 | RSET_UART_SIZE - 1; | ||
64 | uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); | ||
65 | } | ||
66 | |||
67 | if (id == 1) { | ||
68 | uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1); | ||
69 | uart1_resources[0].end = uart1_resources[0].start + | ||
70 | RSET_UART_SIZE - 1; | ||
71 | uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1); | ||
72 | } | ||
73 | |||
74 | return platform_device_register(&bcm63xx_uart_devices[id]); | ||
40 | } | 75 | } |
41 | arch_initcall(bcm63xx_uart_register); | ||