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authorJonas Gorski <jogo@openwrt.org>2013-03-21 10:03:18 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-05-07 19:19:03 -0400
commit08a41d1206bb342c2f0a0aae25ca836658866268 (patch)
treeda76d917249f02f77fcd78ee8213f995d43139e2 /arch/mips/bcm63xx
parent2c8aaf71b0a4738ae8cb70d9367089bdb892aea3 (diff)
MIPS: BCM63XX: enable SPI controller for BCM6362
The SPI controller shares the same register layout as the 6358 one. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5010/ Acked-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r--arch/mips/bcm63xx/clk.c2
-rw-r--r--arch/mips/bcm63xx/dev-spi.c4
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index b9e948d59430..e357d55818ab 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -196,6 +196,8 @@ static void spi_set(struct clk *clk, int enable)
196 mask = CKCTL_6348_SPI_EN; 196 mask = CKCTL_6348_SPI_EN;
197 else if (BCMCPU_IS_6358()) 197 else if (BCMCPU_IS_6358())
198 mask = CKCTL_6358_SPI_EN; 198 mask = CKCTL_6358_SPI_EN;
199 else if (BCMCPU_IS_6362())
200 mask = CKCTL_6362_SPI_EN;
199 else 201 else
200 /* BCMCPU_IS_6368 */ 202 /* BCMCPU_IS_6368 */
201 mask = CKCTL_6368_SPI_EN; 203 mask = CKCTL_6368_SPI_EN;
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c
index 2a43825f7f21..854e9367e235 100644
--- a/arch/mips/bcm63xx/dev-spi.c
+++ b/arch/mips/bcm63xx/dev-spi.c
@@ -37,7 +37,7 @@ static __init void bcm63xx_spi_regs_init(void)
37{ 37{
38 if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) 38 if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
39 bcm63xx_regs_spi = bcm6348_regs_spi; 39 bcm63xx_regs_spi = bcm6348_regs_spi;
40 if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) 40 if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
41 bcm63xx_regs_spi = bcm6358_regs_spi; 41 bcm63xx_regs_spi = bcm6358_regs_spi;
42} 42}
43#else 43#else
@@ -98,7 +98,7 @@ int __init bcm63xx_spi_register(void)
98 spi_pdata.msg_ctl_width = SPI_6348_MSG_CTL_WIDTH; 98 spi_pdata.msg_ctl_width = SPI_6348_MSG_CTL_WIDTH;
99 } 99 }
100 100
101 if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) { 101 if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
102 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; 102 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
103 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE; 103 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
104 spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT; 104 spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;