diff options
author | Maxime Bizon <mbizon@freebox.fr> | 2011-11-04 14:09:31 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 17:03:03 -0500 |
commit | f61cced99347783c1f3a7464e88b855a5ca6c227 (patch) | |
tree | 2ada1d4ab8271fbf65ad207612bbcef0e3333bbb /arch/mips/bcm63xx | |
parent | d430b6c5e7b3a16ad3b4cd921b3a22b553f53ca2 (diff) |
MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.
No functionnal change is introduced by this patch.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx')
-rw-r--r-- | arch/mips/bcm63xx/irq.c | 86 |
1 files changed, 77 insertions, 9 deletions
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index 162e11b4ed75..a81cd828c769 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c | |||
@@ -19,19 +19,86 @@ | |||
19 | #include <bcm63xx_io.h> | 19 | #include <bcm63xx_io.h> |
20 | #include <bcm63xx_irq.h> | 20 | #include <bcm63xx_irq.h> |
21 | 21 | ||
22 | static void __dispatch_internal(void) __maybe_unused; | ||
23 | |||
24 | #ifndef BCMCPU_RUNTIME_DETECT | ||
25 | #ifdef CONFIG_BCM63XX_CPU_6338 | ||
26 | #define irq_stat_reg PERF_IRQSTAT_6338_REG | ||
27 | #define irq_mask_reg PERF_IRQMASK_6338_REG | ||
28 | #endif | ||
29 | #ifdef CONFIG_BCM63XX_CPU_6345 | ||
30 | #define irq_stat_reg PERF_IRQSTAT_6345_REG | ||
31 | #define irq_mask_reg PERF_IRQMASK_6345_REG | ||
32 | #endif | ||
33 | #ifdef CONFIG_BCM63XX_CPU_6348 | ||
34 | #define irq_stat_reg PERF_IRQSTAT_6348_REG | ||
35 | #define irq_mask_reg PERF_IRQMASK_6348_REG | ||
36 | #endif | ||
37 | #ifdef CONFIG_BCM63XX_CPU_6358 | ||
38 | #define irq_stat_reg PERF_IRQSTAT_6358_REG | ||
39 | #define irq_mask_reg PERF_IRQMASK_6358_REG | ||
40 | #endif | ||
41 | |||
42 | #define dispatch_internal __dispatch_internal | ||
43 | |||
44 | #define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg) | ||
45 | #define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg) | ||
46 | |||
47 | static inline void bcm63xx_init_irq(void) | ||
48 | { | ||
49 | } | ||
50 | #else /* ! BCMCPU_RUNTIME_DETECT */ | ||
51 | |||
52 | static u32 irq_stat_addr, irq_mask_addr; | ||
53 | static void (*dispatch_internal)(void); | ||
54 | |||
55 | static void bcm63xx_init_irq(void) | ||
56 | { | ||
57 | irq_stat_addr = bcm63xx_regset_address(RSET_PERF); | ||
58 | irq_mask_addr = bcm63xx_regset_address(RSET_PERF); | ||
59 | |||
60 | switch (bcm63xx_get_cpu_id()) { | ||
61 | case BCM6338_CPU_ID: | ||
62 | irq_stat_addr += PERF_IRQSTAT_6338_REG; | ||
63 | irq_mask_addr += PERF_IRQMASK_6338_REG; | ||
64 | break; | ||
65 | case BCM6345_CPU_ID: | ||
66 | irq_stat_addr += PERF_IRQSTAT_6345_REG; | ||
67 | irq_mask_addr += PERF_IRQMASK_6345_REG; | ||
68 | break; | ||
69 | case BCM6348_CPU_ID: | ||
70 | irq_stat_addr += PERF_IRQSTAT_6348_REG; | ||
71 | irq_mask_addr += PERF_IRQMASK_6348_REG; | ||
72 | break; | ||
73 | case BCM6358_CPU_ID: | ||
74 | irq_stat_addr += PERF_IRQSTAT_6358_REG; | ||
75 | irq_mask_addr += PERF_IRQMASK_6358_REG; | ||
76 | break; | ||
77 | default: | ||
78 | BUG(); | ||
79 | } | ||
80 | |||
81 | dispatch_internal = __dispatch_internal; | ||
82 | } | ||
83 | #endif /* ! BCMCPU_RUNTIME_DETECT */ | ||
84 | |||
85 | static inline void handle_internal(int intbit) | ||
86 | { | ||
87 | do_IRQ(intbit + IRQ_INTERNAL_BASE); | ||
88 | } | ||
89 | |||
22 | /* | 90 | /* |
23 | * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not | 91 | * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not |
24 | * prioritize any interrupt relatively to another. the static counter | 92 | * prioritize any interrupt relatively to another. the static counter |
25 | * will resume the loop where it ended the last time we left this | 93 | * will resume the loop where it ended the last time we left this |
26 | * function. | 94 | * function. |
27 | */ | 95 | */ |
28 | static void bcm63xx_irq_dispatch_internal(void) | 96 | static void __dispatch_internal(void) |
29 | { | 97 | { |
30 | u32 pending; | 98 | u32 pending; |
31 | static int i; | 99 | static int i; |
32 | 100 | ||
33 | pending = bcm_perf_readl(PERF_IRQMASK_REG) & | 101 | pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr); |
34 | bcm_perf_readl(PERF_IRQSTAT_REG); | ||
35 | 102 | ||
36 | if (!pending) | 103 | if (!pending) |
37 | return ; | 104 | return ; |
@@ -41,7 +108,7 @@ static void bcm63xx_irq_dispatch_internal(void) | |||
41 | 108 | ||
42 | i = (i + 1) & 0x1f; | 109 | i = (i + 1) & 0x1f; |
43 | if (pending & (1 << to_call)) { | 110 | if (pending & (1 << to_call)) { |
44 | do_IRQ(to_call + IRQ_INTERNAL_BASE); | 111 | handle_internal(to_call); |
45 | break; | 112 | break; |
46 | } | 113 | } |
47 | } | 114 | } |
@@ -60,7 +127,7 @@ asmlinkage void plat_irq_dispatch(void) | |||
60 | if (cause & CAUSEF_IP7) | 127 | if (cause & CAUSEF_IP7) |
61 | do_IRQ(7); | 128 | do_IRQ(7); |
62 | if (cause & CAUSEF_IP2) | 129 | if (cause & CAUSEF_IP2) |
63 | bcm63xx_irq_dispatch_internal(); | 130 | dispatch_internal(); |
64 | if (cause & CAUSEF_IP3) | 131 | if (cause & CAUSEF_IP3) |
65 | do_IRQ(IRQ_EXT_0); | 132 | do_IRQ(IRQ_EXT_0); |
66 | if (cause & CAUSEF_IP4) | 133 | if (cause & CAUSEF_IP4) |
@@ -81,9 +148,9 @@ static inline void bcm63xx_internal_irq_mask(struct irq_data *d) | |||
81 | unsigned int irq = d->irq - IRQ_INTERNAL_BASE; | 148 | unsigned int irq = d->irq - IRQ_INTERNAL_BASE; |
82 | u32 mask; | 149 | u32 mask; |
83 | 150 | ||
84 | mask = bcm_perf_readl(PERF_IRQMASK_REG); | 151 | mask = bcm_readl(irq_mask_addr); |
85 | mask &= ~(1 << irq); | 152 | mask &= ~(1 << irq); |
86 | bcm_perf_writel(mask, PERF_IRQMASK_REG); | 153 | bcm_writel(mask, irq_mask_addr); |
87 | } | 154 | } |
88 | 155 | ||
89 | static void bcm63xx_internal_irq_unmask(struct irq_data *d) | 156 | static void bcm63xx_internal_irq_unmask(struct irq_data *d) |
@@ -91,9 +158,9 @@ static void bcm63xx_internal_irq_unmask(struct irq_data *d) | |||
91 | unsigned int irq = d->irq - IRQ_INTERNAL_BASE; | 158 | unsigned int irq = d->irq - IRQ_INTERNAL_BASE; |
92 | u32 mask; | 159 | u32 mask; |
93 | 160 | ||
94 | mask = bcm_perf_readl(PERF_IRQMASK_REG); | 161 | mask = bcm_readl(irq_mask_addr); |
95 | mask |= (1 << irq); | 162 | mask |= (1 << irq); |
96 | bcm_perf_writel(mask, PERF_IRQMASK_REG); | 163 | bcm_writel(mask, irq_mask_addr); |
97 | } | 164 | } |
98 | 165 | ||
99 | /* | 166 | /* |
@@ -229,6 +296,7 @@ void __init arch_init_irq(void) | |||
229 | { | 296 | { |
230 | int i; | 297 | int i; |
231 | 298 | ||
299 | bcm63xx_init_irq(); | ||
232 | mips_cpu_irq_init(); | 300 | mips_cpu_irq_init(); |
233 | for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) | 301 | for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) |
234 | irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip, | 302 | irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip, |