diff options
author | Jonas Gorski <jonas.gorski@gmail.com> | 2012-07-24 10:33:12 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-24 10:33:12 -0400 |
commit | e5766aea5b9b7519654261c27b639f567b5415b4 (patch) | |
tree | a4c9cab5c07e5656d0199871e348765fb8a0269d /arch/mips/bcm63xx/setup.c | |
parent | 288752a8aa1be6cf89ee5066435a617efd97fb86 (diff) |
MIPS: BCM63XX: Add basic BCM6328 support
This includes CPU speed, memory size detection and working UART, but
lacking the appropriate drivers, no support for attached flash.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3951/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx/setup.c')
-rw-r--r-- | arch/mips/bcm63xx/setup.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c index 356b05583e14..0e74a13639cd 100644 --- a/arch/mips/bcm63xx/setup.c +++ b/arch/mips/bcm63xx/setup.c | |||
@@ -68,6 +68,9 @@ void bcm63xx_machine_reboot(void) | |||
68 | 68 | ||
69 | /* mask and clear all external irq */ | 69 | /* mask and clear all external irq */ |
70 | switch (bcm63xx_get_cpu_id()) { | 70 | switch (bcm63xx_get_cpu_id()) { |
71 | case BCM6328_CPU_ID: | ||
72 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328; | ||
73 | break; | ||
71 | case BCM6338_CPU_ID: | 74 | case BCM6338_CPU_ID: |
72 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338; | 75 | perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338; |
73 | break; | 76 | break; |
@@ -95,9 +98,13 @@ void bcm63xx_machine_reboot(void) | |||
95 | bcm6348_a1_reboot(); | 98 | bcm6348_a1_reboot(); |
96 | 99 | ||
97 | printk(KERN_INFO "triggering watchdog soft-reset...\n"); | 100 | printk(KERN_INFO "triggering watchdog soft-reset...\n"); |
98 | reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); | 101 | if (BCMCPU_IS_6328()) { |
99 | reg |= SYS_PLL_SOFT_RESET; | 102 | bcm_wdt_writel(1, WDT_SOFTRESET_REG); |
100 | bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); | 103 | } else { |
104 | reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); | ||
105 | reg |= SYS_PLL_SOFT_RESET; | ||
106 | bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); | ||
107 | } | ||
101 | while (1) | 108 | while (1) |
102 | ; | 109 | ; |
103 | } | 110 | } |