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authorKevin Cernekee <cernekee@gmail.com>2010-10-16 17:22:30 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 14:08:50 -0400
commit602977b0d672687909b0cb0542ede134ed6ef858 (patch)
tree8f40b3cfbf2cc32a445a69a548837521fcdfd7d6 /arch/mips/bcm63xx/cpu.c
parent3a9ab99e0341558e451327fbbfc39b0d3cff7e9a (diff)
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: Florian Fainelli <ffainelli@freebox.fr> Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
Diffstat (limited to 'arch/mips/bcm63xx/cpu.c')
-rw-r--r--arch/mips/bcm63xx/cpu.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index cbb7caf86d77..7c7e4d4486ce 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -10,7 +10,9 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/cpu.h> 12#include <linux/cpu.h>
13#include <asm/cpu.h>
13#include <asm/cpu-info.h> 14#include <asm/cpu-info.h>
15#include <asm/mipsregs.h>
14#include <bcm63xx_cpu.h> 16#include <bcm63xx_cpu.h>
15#include <bcm63xx_regs.h> 17#include <bcm63xx_regs.h>
16#include <bcm63xx_io.h> 18#include <bcm63xx_io.h>
@@ -296,26 +298,24 @@ void __init bcm63xx_cpu_init(void)
296 expected_cpu_id = 0; 298 expected_cpu_id = 0;
297 299
298 switch (c->cputype) { 300 switch (c->cputype) {
299 /* 301 case CPU_BMIPS3300:
300 * BCM6338 as the same PrId as BCM3302 see arch/mips/kernel/cpu-probe.c 302 if ((read_c0_prid() & 0xff00) == PRID_IMP_BMIPS3300_ALT) {
301 */ 303 expected_cpu_id = BCM6348_CPU_ID;
302 case CPU_BCM3302: 304 bcm63xx_regs_base = bcm96348_regs_base;
303 __cpu_name[cpu] = "Broadcom BCM6338"; 305 bcm63xx_irqs = bcm96348_irqs;
304 expected_cpu_id = BCM6338_CPU_ID; 306 } else {
305 bcm63xx_regs_base = bcm96338_regs_base; 307 __cpu_name[cpu] = "Broadcom BCM6338";
306 bcm63xx_irqs = bcm96338_irqs; 308 expected_cpu_id = BCM6338_CPU_ID;
309 bcm63xx_regs_base = bcm96338_regs_base;
310 bcm63xx_irqs = bcm96338_irqs;
311 }
307 break; 312 break;
308 case CPU_BCM6345: 313 case CPU_BMIPS32:
309 expected_cpu_id = BCM6345_CPU_ID; 314 expected_cpu_id = BCM6345_CPU_ID;
310 bcm63xx_regs_base = bcm96345_regs_base; 315 bcm63xx_regs_base = bcm96345_regs_base;
311 bcm63xx_irqs = bcm96345_irqs; 316 bcm63xx_irqs = bcm96345_irqs;
312 break; 317 break;
313 case CPU_BCM6348: 318 case CPU_BMIPS4350:
314 expected_cpu_id = BCM6348_CPU_ID;
315 bcm63xx_regs_base = bcm96348_regs_base;
316 bcm63xx_irqs = bcm96348_irqs;
317 break;
318 case CPU_BCM6358:
319 expected_cpu_id = BCM6358_CPU_ID; 319 expected_cpu_id = BCM6358_CPU_ID;
320 bcm63xx_regs_base = bcm96358_regs_base; 320 bcm63xx_regs_base = bcm96358_regs_base;
321 bcm63xx_irqs = bcm96358_irqs; 321 bcm63xx_irqs = bcm96358_irqs;