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authorHauke Mehrtens <hauke@hauke-m.de>2013-12-22 08:36:32 -0500
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 14:18:56 -0500
commit0ded1becc8deaea66f8837c274fd84facc257919 (patch)
tree3d6977f598deda45e25dac0a2576abb86855118c /arch/mips/bcm47xx
parentd775c966c0602d3ea2fad51594e995f2d798b919 (diff)
MIPS: BCM47XX: add vectored interrupt support
This adds support for vectored interrupt which is supported by the SoC using a MIPS 74K CPU like the BCM4716 and BCM4706. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6290/
Diffstat (limited to 'arch/mips/bcm47xx')
-rw-r--r--arch/mips/bcm47xx/Kconfig1
-rw-r--r--arch/mips/bcm47xx/irq.c23
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
index a29f51dd373e..df549af380af 100644
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -21,6 +21,7 @@ config BCM47XX_SSB
21config BCM47XX_BCMA 21config BCM47XX_BCMA
22 bool "BCMA Support for Broadcom BCM47XX" 22 bool "BCMA Support for Broadcom BCM47XX"
23 select SYS_HAS_CPU_MIPS32_R2 23 select SYS_HAS_CPU_MIPS32_R2
24 select CPU_MIPSR2_IRQ_VI
24 select BCMA 25 select BCMA
25 select BCMA_HOST_SOC 26 select BCMA_HOST_SOC
26 select BCMA_DRIVER_MIPS 27 select BCMA_DRIVER_MIPS
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index a9133e9757a0..e0585b76ec19 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -25,6 +25,7 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <asm/setup.h>
28#include <asm/irq_cpu.h> 29#include <asm/irq_cpu.h>
29#include <bcm47xx.h> 30#include <bcm47xx.h>
30 31
@@ -50,6 +51,18 @@ asmlinkage void plat_irq_dispatch(void)
50 do_IRQ(6); 51 do_IRQ(6);
51} 52}
52 53
54#define DEFINE_HWx_IRQDISPATCH(x) \
55 static void bcm47xx_hw ## x ## _irqdispatch(void) \
56 { \
57 do_IRQ(x); \
58 }
59DEFINE_HWx_IRQDISPATCH(2)
60DEFINE_HWx_IRQDISPATCH(3)
61DEFINE_HWx_IRQDISPATCH(4)
62DEFINE_HWx_IRQDISPATCH(5)
63DEFINE_HWx_IRQDISPATCH(6)
64DEFINE_HWx_IRQDISPATCH(7)
65
53void __init arch_init_irq(void) 66void __init arch_init_irq(void)
54{ 67{
55#ifdef CONFIG_BCM47XX_BCMA 68#ifdef CONFIG_BCM47XX_BCMA
@@ -64,4 +77,14 @@ void __init arch_init_irq(void)
64 } 77 }
65#endif 78#endif
66 mips_cpu_irq_init(); 79 mips_cpu_irq_init();
80
81 if (cpu_has_vint) {
82 pr_info("Setting up vectored interrupts\n");
83 set_vi_handler(2, bcm47xx_hw2_irqdispatch);
84 set_vi_handler(3, bcm47xx_hw3_irqdispatch);
85 set_vi_handler(4, bcm47xx_hw4_irqdispatch);
86 set_vi_handler(5, bcm47xx_hw5_irqdispatch);
87 set_vi_handler(6, bcm47xx_hw6_irqdispatch);
88 set_vi_handler(7, bcm47xx_hw7_irqdispatch);
89 }
67} 90}