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authorAurelien Jarno <aurelien@aurel32.net>2008-10-14 05:44:26 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-15 07:46:50 -0400
commitb06f3e19a673e44ff56ce265600c5c6eb99aa914 (patch)
tree50ae6bf47907f1f2e71f849e0638281a2d86f80d /arch/mips/bcm47xx/setup.c
parentd412283cef135811e1ed6c3840376c239f4920dd (diff)
MIPS: BCM47xx: Use the new SSB GPIO API
This patch simplifies the BCM47xx GPIO code by using the new SSB GPIO API, which does a lot things that were implemented directly in the BCM47xx code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm47xx/setup.c')
-rw-r--r--arch/mips/bcm47xx/setup.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 8d36f186890e..2f580fa160c9 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -27,6 +27,7 @@
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/ssb/ssb.h> 29#include <linux/ssb/ssb.h>
30#include <linux/ssb/ssb_embedded.h>
30#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
31#include <asm/reboot.h> 32#include <asm/reboot.h>
32#include <asm/time.h> 33#include <asm/time.h>
@@ -41,7 +42,7 @@ static void bcm47xx_machine_restart(char *command)
41 printk(KERN_ALERT "Please stand by while rebooting the system...\n"); 42 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
42 local_irq_disable(); 43 local_irq_disable();
43 /* Set the watchdog timer to reset immediately */ 44 /* Set the watchdog timer to reset immediately */
44 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1); 45 ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
45 while (1) 46 while (1)
46 cpu_relax(); 47 cpu_relax();
47} 48}
@@ -50,7 +51,7 @@ static void bcm47xx_machine_halt(void)
50{ 51{
51 /* Disable interrupts and watchdog and spin forever */ 52 /* Disable interrupts and watchdog and spin forever */
52 local_irq_disable(); 53 local_irq_disable();
53 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0); 54 ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
54 while (1) 55 while (1)
55 cpu_relax(); 56 cpu_relax();
56} 57}