diff options
author | Hauke Mehrtens <hauke@hauke-m.de> | 2011-07-22 19:20:13 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-08-08 14:29:31 -0400 |
commit | a656ffcbc7a98a80d2136ae6bbdd8ae2eb48c78a (patch) | |
tree | 9b732b9a15ad8cc9c8790f36f3ac9a00bf6972c2 /arch/mips/bcm47xx/setup.c | |
parent | 08ccf57283f89adbc2ff897ad82d6ad4560db7cd (diff) |
bcm47xx: make it possible to build bcm47xx without ssb.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'arch/mips/bcm47xx/setup.c')
-rw-r--r-- | arch/mips/bcm47xx/setup.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c index 271cedb339ae..142cf1bc8884 100644 --- a/arch/mips/bcm47xx/setup.c +++ b/arch/mips/bcm47xx/setup.c | |||
@@ -47,9 +47,11 @@ static void bcm47xx_machine_restart(char *command) | |||
47 | local_irq_disable(); | 47 | local_irq_disable(); |
48 | /* Set the watchdog timer to reset immediately */ | 48 | /* Set the watchdog timer to reset immediately */ |
49 | switch (bcm47xx_bus_type) { | 49 | switch (bcm47xx_bus_type) { |
50 | #ifdef CONFIG_BCM47XX_SSB | ||
50 | case BCM47XX_BUS_TYPE_SSB: | 51 | case BCM47XX_BUS_TYPE_SSB: |
51 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); | 52 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); |
52 | break; | 53 | break; |
54 | #endif | ||
53 | } | 55 | } |
54 | while (1) | 56 | while (1) |
55 | cpu_relax(); | 57 | cpu_relax(); |
@@ -60,14 +62,17 @@ static void bcm47xx_machine_halt(void) | |||
60 | /* Disable interrupts and watchdog and spin forever */ | 62 | /* Disable interrupts and watchdog and spin forever */ |
61 | local_irq_disable(); | 63 | local_irq_disable(); |
62 | switch (bcm47xx_bus_type) { | 64 | switch (bcm47xx_bus_type) { |
65 | #ifdef CONFIG_BCM47XX_SSB | ||
63 | case BCM47XX_BUS_TYPE_SSB: | 66 | case BCM47XX_BUS_TYPE_SSB: |
64 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); | 67 | ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); |
65 | break; | 68 | break; |
69 | #endif | ||
66 | } | 70 | } |
67 | while (1) | 71 | while (1) |
68 | cpu_relax(); | 72 | cpu_relax(); |
69 | } | 73 | } |
70 | 74 | ||
75 | #ifdef CONFIG_BCM47XX_SSB | ||
71 | #define READ_FROM_NVRAM(_outvar, name, buf) \ | 76 | #define READ_FROM_NVRAM(_outvar, name, buf) \ |
72 | if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\ | 77 | if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\ |
73 | sprom->_outvar = simple_strtoul(buf, NULL, 0); | 78 | sprom->_outvar = simple_strtoul(buf, NULL, 0); |
@@ -288,13 +293,16 @@ static void __init bcm47xx_register_ssb(void) | |||
288 | } | 293 | } |
289 | } | 294 | } |
290 | } | 295 | } |
296 | #endif | ||
291 | 297 | ||
292 | void __init plat_mem_setup(void) | 298 | void __init plat_mem_setup(void) |
293 | { | 299 | { |
294 | struct cpuinfo_mips *c = ¤t_cpu_data; | 300 | struct cpuinfo_mips *c = ¤t_cpu_data; |
295 | 301 | ||
302 | #ifdef CONFIG_BCM47XX_SSB | ||
296 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; | 303 | bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; |
297 | bcm47xx_register_ssb(); | 304 | bcm47xx_register_ssb(); |
305 | #endif | ||
298 | 306 | ||
299 | _machine_restart = bcm47xx_machine_restart; | 307 | _machine_restart = bcm47xx_machine_restart; |
300 | _machine_halt = bcm47xx_machine_halt; | 308 | _machine_halt = bcm47xx_machine_halt; |