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authorPete Popov <ppopov@embeddedalley.com>2005-04-08 04:34:43 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:02 -0400
commitfe359bf58414478a0ddbd65923e2f1aceedf330f (patch)
treef40b1bffd5a974242dd3ee19872daaa9056ba900 /arch/mips/au1000
parent494900af689a22479eb405ff1323cad673bd9208 (diff)
Fixed buglet with previous patch that broke non au1x builds.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000')
-rw-r--r--arch/mips/au1000/common/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 2bc33824807b..2f81a0c00442 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -57,7 +57,7 @@ unsigned long missed_heart_beats = 0;
57static unsigned long r4k_offset; /* Amount to increment compare reg each time */ 57static unsigned long r4k_offset; /* Amount to increment compare reg each time */
58static unsigned long r4k_cur; /* What counter should be at next timer irq */ 58static unsigned long r4k_cur; /* What counter should be at next timer irq */
59int no_au1xxx_32khz; 59int no_au1xxx_32khz;
60int allow_au1k_wait = 0; /* default off for CP0 Counter */ 60extern int allow_au1k_wait; /* default off for CP0 Counter */
61 61
62/* Cycle counter value at the previous timer interrupt.. */ 62/* Cycle counter value at the previous timer interrupt.. */
63static unsigned int timerhi = 0, timerlo = 0; 63static unsigned int timerhi = 0, timerlo = 0;