diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-11-07 05:19:05 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 11:53:20 -0500 |
commit | 3f21cdee412089ed7ea12c3650bfb4211cf0b1d0 (patch) | |
tree | 46b72f9950283f25cde4532cb52c3e4d167d9e2a /arch/mips/au1000/pb1100 | |
parent | 786d7cdd06581773ee7913560838d6f4487d2d9f (diff) |
[MIPS] PB1100: Fix pile of warnings
CC arch/mips/au1000/pb1100/board_setup.o
arch/mips/au1000/pb1100/board_setup.c: In function ‘board_setup’:
arch/mips/au1000/pb1100/board_setup.c:104: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:109: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_clksrc’
arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_freqctrl’
arch/mips/au1000/pb1100/board_setup.c:50: warning: unused variable ‘pin_func’
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000/pb1100')
-rw-r--r-- | arch/mips/au1000/pb1100/board_setup.c | 93 |
1 files changed, 48 insertions, 45 deletions
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c index 2d1533f116c0..6bc1f8e1b608 100644 --- a/arch/mips/au1000/pb1100/board_setup.c +++ b/arch/mips/au1000/pb1100/board_setup.c | |||
@@ -47,8 +47,7 @@ void board_reset (void) | |||
47 | 47 | ||
48 | void __init board_setup(void) | 48 | void __init board_setup(void) |
49 | { | 49 | { |
50 | u32 pin_func; | 50 | volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; |
51 | u32 sys_freqctrl, sys_clksrc; | ||
52 | 51 | ||
53 | // set AUX clock to 12MHz * 8 = 96 MHz | 52 | // set AUX clock to 12MHz * 8 = 96 MHz |
54 | au_writel(8, SYS_AUXPLL); | 53 | au_writel(8, SYS_AUXPLL); |
@@ -56,58 +55,62 @@ void __init board_setup(void) | |||
56 | udelay(100); | 55 | udelay(100); |
57 | 56 | ||
58 | #ifdef CONFIG_USB_OHCI | 57 | #ifdef CONFIG_USB_OHCI |
59 | // configure pins GPIO[14:9] as GPIO | 58 | { |
60 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); | 59 | u32 pin_func, sys_freqctrl, sys_clksrc; |
61 | 60 | ||
62 | /* zero and disable FREQ2 */ | 61 | // configure pins GPIO[14:9] as GPIO |
63 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | 62 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); |
64 | sys_freqctrl &= ~0xFFF00000; | 63 | |
65 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | 64 | /* zero and disable FREQ2 */ |
66 | 65 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
67 | /* zero and disable USBH/USBD/IrDA clock */ | 66 | sys_freqctrl &= ~0xFFF00000; |
68 | sys_clksrc = au_readl(SYS_CLKSRC); | 67 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
69 | sys_clksrc &= ~0x0000001F; | 68 | |
70 | au_writel(sys_clksrc, SYS_CLKSRC); | 69 | /* zero and disable USBH/USBD/IrDA clock */ |
71 | 70 | sys_clksrc = au_readl(SYS_CLKSRC); | |
72 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | 71 | sys_clksrc &= ~0x0000001F; |
73 | sys_freqctrl &= ~0xFFF00000; | 72 | au_writel(sys_clksrc, SYS_CLKSRC); |
74 | 73 | ||
75 | sys_clksrc = au_readl(SYS_CLKSRC); | 74 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
76 | sys_clksrc &= ~0x0000001F; | 75 | sys_freqctrl &= ~0xFFF00000; |
77 | 76 | ||
78 | // FREQ2 = aux/2 = 48 MHz | 77 | sys_clksrc = au_readl(SYS_CLKSRC); |
79 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); | 78 | sys_clksrc &= ~0x0000001F; |
80 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | 79 | |
81 | 80 | // FREQ2 = aux/2 = 48 MHz | |
82 | /* | 81 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); |
83 | * Route 48MHz FREQ2 into USBH/USBD/IrDA | 82 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
84 | */ | 83 | |
85 | sys_clksrc |= ((4<<2) | (0<<1) | 0 ); | 84 | /* |
86 | au_writel(sys_clksrc, SYS_CLKSRC); | 85 | * Route 48MHz FREQ2 into USBH/USBD/IrDA |
87 | 86 | */ | |
88 | /* setup the static bus controller */ | 87 | sys_clksrc |= ((4<<2) | (0<<1) | 0 ); |
89 | au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | 88 | au_writel(sys_clksrc, SYS_CLKSRC); |
90 | au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ | 89 | |
91 | au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ | 90 | /* setup the static bus controller */ |
92 | 91 | au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | |
93 | // get USB Functionality pin state (device vs host drive pins) | 92 | au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ |
94 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); | 93 | au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ |
95 | // 2nd USB port is USB host | 94 | |
96 | pin_func |= 0x8000; | 95 | // get USB Functionality pin state (device vs host drive pins) |
97 | au_writel(pin_func, SYS_PINFUNC); | 96 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); |
97 | // 2nd USB port is USB host | ||
98 | pin_func |= 0x8000; | ||
99 | au_writel(pin_func, SYS_PINFUNC); | ||
100 | } | ||
98 | #endif // defined (CONFIG_USB_OHCI) | 101 | #endif // defined (CONFIG_USB_OHCI) |
99 | 102 | ||
100 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ | 103 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ |
101 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); | 104 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); |
102 | 105 | ||
103 | // Enable the RTC if not already enabled | 106 | // Enable the RTC if not already enabled |
104 | if (!(readb(0xac000028) & 0x20)) { | 107 | if (!(readb(base + 0x28) & 0x20)) { |
105 | writeb(readb(0xac000028) | 0x20, 0xac000028); | 108 | writeb(readb(base + 0x28) | 0x20, base + 0x28); |
106 | au_sync(); | 109 | au_sync(); |
107 | } | 110 | } |
108 | // Put the clock in BCD mode | 111 | // Put the clock in BCD mode |
109 | if (readb(0xac00002C) & 0x4) { /* reg B */ | 112 | if (readb(base + 0x2C) & 0x4) { /* reg B */ |
110 | writeb(readb(0xac00002c) & ~0x4, 0xac00002c); | 113 | writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); |
111 | au_sync(); | 114 | au_sync(); |
112 | } | 115 | } |
113 | } | 116 | } |