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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2008-04-29 15:33:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-05-12 11:46:56 -0400
commitcb0e8b0fba53e1aa6c4786bc465cfc641e8a77e7 (patch)
tree9d75c409db0434ce2f6b1830fb1901567b55299a /arch/mips/au1000/pb1000
parent005ca9a3f1238ffebd9c4d09d581f708277d2985 (diff)
[MIPS] Pb1000: bury the remnants of the PCI code
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000/pb1000')
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index a06c653596cb..25df167a95b3 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -145,13 +145,6 @@ void __init board_setup(void)
145 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ 145 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
146 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ 146 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
147 147
148#ifdef CONFIG_PCI
149 au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
150 au_writel(0, SDRAM_MBAR); // set mbar to 0
151 au_writel(0x2, SDRAM_CMD); // enable memory accesses
152 au_sync_delay(1);
153#endif
154
155 /* 148 /*
156 * Enable Au1000 BCLK switching - note: sed1356 must not use 149 * Enable Au1000 BCLK switching - note: sed1356 must not use
157 * its BCLK (Au1000 LCLK) for any timings 150 * its BCLK (Au1000 LCLK) for any timings