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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/au1000/pb1000
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/mips/au1000/pb1000')
-rw-r--r--arch/mips/au1000/pb1000/Makefile8
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c182
-rw-r--r--arch/mips/au1000/pb1000/init.c69
-rw-r--r--arch/mips/au1000/pb1000/irqmap.c54
4 files changed, 313 insertions, 0 deletions
diff --git a/arch/mips/au1000/pb1000/Makefile b/arch/mips/au1000/pb1000/Makefile
new file mode 100644
index 000000000000..daa1a507e72f
--- /dev/null
+++ b/arch/mips/au1000/pb1000/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2000 MontaVista Software Inc.
3# Author: MontaVista Software, Inc.
4# ppopov@mvista.com or source@mvista.com
5#
6# Makefile for the Alchemy Semiconductor PB1000 board.
7
8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
new file mode 100644
index 000000000000..2fa211b69329
--- /dev/null
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -0,0 +1,182 @@
1/*
2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#include <linux/config.h>
27#include <linux/init.h>
28#include <linux/sched.h>
29#include <linux/ioport.h>
30#include <linux/mm.h>
31#include <linux/console.h>
32#include <linux/delay.h>
33
34#include <asm/cpu.h>
35#include <asm/bootinfo.h>
36#include <asm/irq.h>
37#include <asm/mipsregs.h>
38#include <asm/reboot.h>
39#include <asm/pgtable.h>
40#include <asm/mach-au1x00/au1000.h>
41#include <asm/mach-pb1x00/pb1000.h>
42
43void board_reset (void)
44{
45}
46
47void __init board_setup(void)
48{
49 u32 pin_func, static_cfg0;
50 u32 sys_freqctrl, sys_clksrc;
51 u32 prid = read_c0_prid();
52
53 // set AUX clock to 12MHz * 8 = 96 MHz
54 au_writel(8, SYS_AUXPLL);
55 au_writel(0, SYS_PINSTATERD);
56 udelay(100);
57
58#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
59 /* zero and disable FREQ2 */
60 sys_freqctrl = au_readl(SYS_FREQCTRL0);
61 sys_freqctrl &= ~0xFFF00000;
62 au_writel(sys_freqctrl, SYS_FREQCTRL0);
63
64 /* zero and disable USBH/USBD clocks */
65 sys_clksrc = au_readl(SYS_CLKSRC);
66 sys_clksrc &= ~0x00007FE0;
67 au_writel(sys_clksrc, SYS_CLKSRC);
68
69 sys_freqctrl = au_readl(SYS_FREQCTRL0);
70 sys_freqctrl &= ~0xFFF00000;
71
72 sys_clksrc = au_readl(SYS_CLKSRC);
73 sys_clksrc &= ~0x00007FE0;
74
75 switch (prid & 0x000000FF)
76 {
77 case 0x00: /* DA */
78 case 0x01: /* HA */
79 case 0x02: /* HB */
80 /* CPU core freq to 48MHz to slow it way down... */
81 au_writel(4, SYS_CPUPLL);
82
83 /*
84 * Setup 48MHz FREQ2 from CPUPLL for USB Host
85 */
86 /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
87 sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
88 au_writel(sys_freqctrl, SYS_FREQCTRL0);
89
90 /* CPU core freq to 384MHz */
91 au_writel(0x20, SYS_CPUPLL);
92
93 printk("Au1000: 48MHz OHCI workaround enabled\n");
94 break;
95
96 default: /* HC and newer */
97 // FREQ2 = aux/2 = 48 MHz
98 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
99 au_writel(sys_freqctrl, SYS_FREQCTRL0);
100 break;
101 }
102
103 /*
104 * Route 48MHz FREQ2 into USB Host and/or Device
105 */
106#ifdef CONFIG_USB_OHCI
107 sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
108#endif
109#ifdef CONFIG_AU1X00_USB_DEVICE
110 sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
111#endif
112 au_writel(sys_clksrc, SYS_CLKSRC);
113
114 // configure pins GPIO[14:9] as GPIO
115 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080);
116
117#ifndef CONFIG_AU1X00_USB_DEVICE
118 // 2nd USB port is USB host
119 pin_func |= 0x8000;
120#endif
121 au_writel(pin_func, SYS_PINFUNC);
122 au_writel(0x2800, SYS_TRIOUTCLR);
123 au_writel(0x0030, SYS_OUTPUTCLR);
124#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
125
126 // make gpio 15 an input (for interrupt line)
127 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x100);
128 // we don't need I2S, so make it available for GPIO[31:29]
129 pin_func |= (1<<5);
130 au_writel(pin_func, SYS_PINFUNC);
131
132 au_writel(0x8000, SYS_TRIOUTCLR);
133
134 static_cfg0 = au_readl(MEM_STCFG0) & (u32)(~0xc00);
135 au_writel(static_cfg0, MEM_STCFG0);
136
137 // configure RCE2* for LCD
138 au_writel(0x00000004, MEM_STCFG2);
139
140 // MEM_STTIME2
141 au_writel(0x09000000, MEM_STTIME2);
142
143 // Set 32-bit base address decoding for RCE2*
144 au_writel(0x10003ff0, MEM_STADDR2);
145
146 // PCI CPLD setup
147 // expand CE0 to cover PCI
148 au_writel(0x11803e40, MEM_STADDR1);
149
150 // burst visibility on
151 au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
152
153 au_writel(0x83, MEM_STCFG1); // ewait enabled, flash timing
154 au_writel(0x33030a10, MEM_STTIME1); // slower timing for FPGA
155
156 /* setup the static bus controller */
157 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
158 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
159 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
160
161#ifdef CONFIG_PCI
162 au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
163 au_writel(0, SDRAM_MBAR); // set mbar to 0
164 au_writel(0x2, SDRAM_CMD); // enable memory accesses
165 au_sync_delay(1);
166#endif
167
168 /* Enable Au1000 BCLK switching - note: sed1356 must not use
169 * its BCLK (Au1000 LCLK) for any timings */
170 switch (prid & 0x000000FF)
171 {
172 case 0x00: /* DA */
173 case 0x01: /* HA */
174 case 0x02: /* HB */
175 break;
176 default: /* HC and newer */
177 /* Enable sys bus clock divider when IDLE state or no bus
178 activity. */
179 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
180 break;
181 }
182}
diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/au1000/pb1000/init.c
new file mode 100644
index 000000000000..34713c5df0d7
--- /dev/null
+++ b/arch/mips/au1000/pb1000/init.c
@@ -0,0 +1,69 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * PB1000 board setup
4 *
5 * Copyright 2001 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/init.h>
30#include <linux/mm.h>
31#include <linux/sched.h>
32#include <linux/bootmem.h>
33#include <asm/addrspace.h>
34#include <asm/bootinfo.h>
35#include <linux/string.h>
36#include <linux/kernel.h>
37
38int prom_argc;
39char **prom_argv, **prom_envp;
40extern void __init prom_init_cmdline(void);
41extern char *prom_getenv(char *envname);
42
43const char *get_system_type(void)
44{
45 return "Alchemy Pb1000";
46}
47
48void __init prom_init(void)
49{
50 unsigned char *memsize_str;
51 unsigned long memsize;
52
53 prom_argc = (int) fw_arg0;
54 prom_argv = (char **) fw_arg1;
55 prom_envp = (char **) fw_arg2;
56
57 mips_machgroup = MACH_GROUP_ALCHEMY;
58 mips_machtype = MACH_PB1000;
59
60 prom_init_cmdline();
61 memsize_str = prom_getenv("memsize");
62 if (!memsize_str) {
63 memsize = 0x04000000;
64 } else {
65 memsize = simple_strtol(memsize_str, NULL, 0);
66 }
67 add_memory_region(0, memsize, BOOT_MEM_RAM);
68 return 0;
69}
diff --git a/arch/mips/au1000/pb1000/irqmap.c b/arch/mips/au1000/pb1000/irqmap.c
new file mode 100644
index 000000000000..a3c460e3c23e
--- /dev/null
+++ b/arch/mips/au1000/pb1000/irqmap.c
@@ -0,0 +1,54 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * Copyright 2003 Embedded Edge, LLC
6 * dan@embeddededge.com
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28#include <linux/errno.h>
29#include <linux/init.h>
30#include <linux/irq.h>
31#include <linux/kernel_stat.h>
32#include <linux/module.h>
33#include <linux/signal.h>
34#include <linux/sched.h>
35#include <linux/types.h>
36#include <linux/interrupt.h>
37#include <linux/ioport.h>
38#include <linux/timex.h>
39#include <linux/slab.h>
40#include <linux/random.h>
41#include <linux/delay.h>
42#include <linux/bitops.h>
43
44#include <asm/bootinfo.h>
45#include <asm/io.h>
46#include <asm/mipsregs.h>
47#include <asm/system.h>
48#include <asm/mach-au1x00/au1000.h>
49
50au1xxx_irq_map_t au1xxx_irq_map[] = {
51 { AU1000_GPIO_15, INTC_INT_LOW_LEVEL, 0 },
52};
53
54int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 10:30:51 -0500