Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

4 files changed, 402 insertions, 0 deletions

diff --git a/arch/mips/au1000/csb250/Makefile b/arch/mips/au1000/csb250/Makefile
new file mode 100644
index 000000000000..c0c4dcdccae8
--- /dev/null
+++ b/arch/mips/au1000/csb250/Makefile
@@ -0,0 +1,8 @@
+#
+#  Copyright 2002 Cogent Computer Systems
+#       dan@embeddededge.com
+#
+# Makefile for the Cogent CSB250 Au1500 board.  Copied from Pb1500.
+#
+
+obj-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/csb250/board_setup.c b/arch/mips/au1000/csb250/board_setup.c
new file mode 100644
index 000000000000..90426eaffb23
--- /dev/null
+++ b/arch/mips/au1000/csb250/board_setup.c
@@ -0,0 +1,239 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *      Cogent CSB250 board setup.
+ *
+ * Copyright 2002 Cogent Computer Systems, Inc.
+ *      dan@embeddededge.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/csb250.h>
+
+extern int (*board_pci_idsel)(unsigned int devsel, int assert);
+int     csb250_pci_idsel(unsigned int devsel, int assert);
+
+void __init board_setup(void)
+{
+        u32 pin_func, pin_val;
+        u32 sys_freqctrl, sys_clksrc;
+
+
+        // set AUX clock to 12MHz * 8 = 96 MHz
+        au_writel(8, SYS_AUXPLL);
+        au_writel(0, SYS_PINSTATERD);
+        udelay(100);
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+        /* GPIO201 is input for PCMCIA card detect */
+        /* GPIO203 is input for PCMCIA interrupt request */
+        au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
+
+        /* zero and disable FREQ2 */
+        sys_freqctrl = au_readl(SYS_FREQCTRL0);
+        sys_freqctrl &= ~0xFFF00000;
+        au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+        /* zero and disable USBH/USBD clocks */
+        sys_clksrc = au_readl(SYS_CLKSRC);
+        sys_clksrc &= ~0x00007FE0;
+        au_writel(sys_clksrc, SYS_CLKSRC);
+
+        sys_freqctrl = au_readl(SYS_FREQCTRL0);
+        sys_freqctrl &= ~0xFFF00000;
+
+        sys_clksrc = au_readl(SYS_CLKSRC);
+        sys_clksrc &= ~0x00007FE0;
+
+        // FREQ2 = aux/2 = 48 MHz
+        sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+        au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+        /*
+         * Route 48MHz FREQ2 into USB Host and/or Device
+         */
+#ifdef CONFIG_USB_OHCI
+        sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
+#endif
+#ifdef CONFIG_AU1X00_USB_DEVICE
+        sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
+#endif
+        au_writel(sys_clksrc, SYS_CLKSRC);
+
+
+        pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+#ifndef CONFIG_AU1X00_USB_DEVICE
+        // 2nd USB port is USB host
+        pin_func |= 0x8000;
+#endif
+        au_writel(pin_func, SYS_PINFUNC);
+#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+        /* Configure GPIO2....it's used by PCI among other things.
+        */
+
+        /* Make everything but GP200 (PCI RST) an input until we get
+         * the pins set correctly.
+         */
+        au_writel(0x00000001, GPIO2_DIR);
+
+        /* Set the pins used for output.
+         * A zero bit will leave PCI reset, LEDs off, power up USB,
+         * IDSEL disabled.
+         */
+        pin_val = ((3 << 30) | (7 << 19) | (1 << 17) | (1 << 16));
+        au_writel(pin_val, GPIO2_OUTPUT);
+
+        /* Set the output direction.
+        */
+        pin_val = ((3 << 14) | (7 << 3) | (1 << 1) | (1 << 0));
+        au_writel(pin_val, GPIO2_DIR);
+
+#ifdef CONFIG_PCI
+        /* Use FREQ1 for the PCI output clock.  We use the
+         * CPU clock of 384 MHz divided by 12 to get 32 MHz PCI.
+         * If Michael changes the CPU speed, we need to adjust
+         * that here as well :-).
+         */
+
+        /* zero and disable FREQ1
+        */
+        sys_freqctrl = au_readl(SYS_FREQCTRL0);
+        sys_freqctrl &= ~0x000ffc00;
+        au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+        /* zero and disable PCI clock
+        */
+        sys_clksrc = au_readl(SYS_CLKSRC);
+        sys_clksrc &= ~0x000f8000;
+        au_writel(sys_clksrc, SYS_CLKSRC);
+
+        /* Get current values (which really should match above).
+        */
+        sys_freqctrl = au_readl(SYS_FREQCTRL0);
+        sys_freqctrl &= ~0x000ffc00;
+
+        sys_clksrc = au_readl(SYS_CLKSRC);
+        sys_clksrc &= ~0x000f8000;
+
+        /* FREQ1 = cpu/12 = 32 MHz
+        */
+        sys_freqctrl |= ((5<<12) | (1<<11) | (0<<10));
+        au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+        /* Just connect the clock without further dividing.
+        */
+        sys_clksrc |= ((3<<17) | (0<<16) | (0<<15));
+        au_writel(sys_clksrc, SYS_CLKSRC);
+
+        udelay(1);
+
+        /* Now that clocks should be running, take PCI out of reset.
+        */
+        pin_val = au_readl(GPIO2_OUTPUT);
+        pin_val |= ((1 << 16) | 1);
+        au_writel(pin_val, GPIO2_OUTPUT);
+
+        // Setup PCI bus controller
+        au_writel(0, Au1500_PCI_CMEM);
+        au_writel(0x00003fff, Au1500_CFG_BASE);
+
+        /* We run big endian without any of the software byte swapping,
+         * so configure the PCI bridge to help us out.
+         */
+        au_writel(0xf | (2<<6) | (1<<5) | (1<<4), Au1500_PCI_CFG);
+
+        au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
+        au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
+        au_writel(0x02a00356, Au1500_PCI_STATCMD);
+        au_writel(0x00003c04, Au1500_PCI_HDRTYPE);      
+        au_writel(0x00000008, Au1500_PCI_MBAR);
+        au_sync();
+
+        board_pci_idsel = csb250_pci_idsel;
+#endif
+
+        /* Enable sys bus clock divider when IDLE state or no bus activity. */
+        au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
+
+#ifdef CONFIG_RTC
+        // Enable the RTC if not already enabled
+        if (!(au_readl(0xac000028) & 0x20)) {
+                printk("enabling clock ...\n");
+                au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
+        }
+        // Put the clock in BCD mode
+        if (readl(0xac00002C) & 0x4) { /* reg B */
+                au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
+                au_sync();
+        }
+#endif
+}
+
+/* The IDSEL is selected in the GPIO2 register.  We will make device
+ * 12 appear in slot 0 and device 13 appear in slot 1.
+ */
+int
+csb250_pci_idsel(unsigned int devsel, int assert)
+{
+        int             retval;
+        unsigned int    gpio2_pins;
+
+        retval = 1;
+        
+        /* First, disable both selects, then assert the one requested.
+        */
+        au_writel(0xc000c000, GPIO2_OUTPUT);
+        au_sync();
+
+        if (assert) {
+                if (devsel == 12)
+                        gpio2_pins = 0x40000000;
+                else if (devsel == 13)
+                        gpio2_pins = 0x80000000;
+                else {
+                        gpio2_pins = 0xc000c000;
+                        retval = 0;
+                }
+                au_writel(gpio2_pins, GPIO2_OUTPUT);
+        }
+        au_sync();
+
+        return retval;
+}
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c
new file mode 100644
index 000000000000..4320057fc439
--- /dev/null
+++ b/arch/mips/au1000/csb250/init.c
@@ -0,0 +1,95 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *      Cogent CSB250 board setup
+ *
+ * Copyright 2002 Cogent Computer Systems, Inc.
+ *      dan@embeddededge.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void  __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+/* When we get initrd working someday.........
+*/
+int     my_initrd_start, my_initrd_size;
+
+/* Start arguments and environment.
+*/
+static char     *csb_env[2];
+static char     *csb_arg[4];
+static char     *arg1 = "console=ttyS3,38400";
+static char     *arg2 = "root=/dev/nfs rw ip=any";
+static char     *env1 = "ethaddr=00:30:23:50:00:00";
+
+const char *get_system_type(void)
+{
+        return "Cogent CSB250";
+}
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+        unsigned char *memsize_str;
+        unsigned long memsize;
+
+        /* We use a0 and a1 to pass initrd start and size.
+        */
+        if (((uint) argc > 0) && ((uint)argv > 0)) {
+                my_initrd_start = (uint)argc;
+                my_initrd_size = (uint)argv;
+        }
+
+        /* First argv is ignored.
+        */
+        prom_argc = 3;
+        prom_argv = csb_arg;
+        prom_envp = csb_env;
+        csb_arg[1] = arg1;
+        csb_arg[2] = arg2;
+        csb_env[0] = env1;
+
+        mips_machgroup = MACH_GROUP_ALCHEMY;
+        mips_machtype = MACH_CSB250;  
+
+        prom_init_cmdline();
+        memsize_str = prom_getenv("memsize");
+        if (!memsize_str) {
+                memsize = 0x02000000;
+        } else {
+                memsize = simple_strtol(memsize_str, NULL, 0);
+        }
+        add_memory_region(0, memsize, BOOT_MEM_RAM);
+        return 0;
+}
diff --git a/arch/mips/au1000/csb250/irqmap.c b/arch/mips/au1000/csb250/irqmap.c
new file mode 100644
index 000000000000..5cb1166be35c
--- /dev/null
+++ b/arch/mips/au1000/csb250/irqmap.c
@@ -0,0 +1,60 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ *      Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ *              dan@embeddededge.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
+
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+
+        { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+        { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
+        { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
+        { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
+        { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+        { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);