aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/au1000/common/time.c
diff options
context:
space:
mode:
authorSergei Shtylyov <sshtylyov@ru.mvista.com>2006-09-03 14:17:10 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-30 16:41:26 -0500
commit53c1b192ece077e1c3892e6afb453ab6f009af81 (patch)
tree559e2bb25c676098a1d063a1da3a513449a99695 /arch/mips/au1000/common/time.c
parentbe609f3546d3dd96afd7df8856a91fa2b8825fbc (diff)
[MIPS] Au1xx0 code sets incorrect mips_hpt_frequency
Alchemy CPU counter ticks at the full CPU clock speed. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000/common/time.c')
-rw-r--r--arch/mips/au1000/common/time.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 94f09194d63d..7313ef234d8c 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -231,7 +231,6 @@ wakeup_counter0_set(int ticks)
231 */ 231 */
232unsigned long cal_r4koff(void) 232unsigned long cal_r4koff(void)
233{ 233{
234 unsigned long count;
235 unsigned long cpu_speed; 234 unsigned long cpu_speed;
236 unsigned long flags; 235 unsigned long flags;
237 unsigned long counter; 236 unsigned long counter;
@@ -258,7 +257,7 @@ unsigned long cal_r4koff(void)
258 257
259#if defined(CONFIG_AU1000_USE32K) 258#if defined(CONFIG_AU1000_USE32K)
260 { 259 {
261 unsigned long start, end; 260 unsigned long start, end, count;
262 261
263 start = au_readl(SYS_RTCREAD); 262 start = au_readl(SYS_RTCREAD);
264 start += 2; 263 start += 2;
@@ -282,7 +281,6 @@ unsigned long cal_r4koff(void)
282#else 281#else
283 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * 282 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
284 AU1000_SRC_CLK; 283 AU1000_SRC_CLK;
285 count = cpu_speed / 2;
286#endif 284#endif
287 } 285 }
288 else { 286 else {
@@ -291,10 +289,9 @@ unsigned long cal_r4koff(void)
291 * NOTE: some old silicon doesn't allow reading the PLL. 289 * NOTE: some old silicon doesn't allow reading the PLL.
292 */ 290 */
293 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK; 291 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
294 count = cpu_speed / 2;
295 no_au1xxx_32khz = 1; 292 no_au1xxx_32khz = 1;
296 } 293 }
297 mips_hpt_frequency = count; 294 mips_hpt_frequency = cpu_speed;
298 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) 295 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
299 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); 296 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
300 spin_unlock_irqrestore(&time_lock, flags); 297 spin_unlock_irqrestore(&time_lock, flags);