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authorRalf Baechle <ralf@linux-mips.org>2008-09-16 13:12:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 11:18:50 -0400
commite8c7c482347574ecdd45c43e32c332d5fc2ece61 (patch)
treec741aa6cdb4e897df9f9476d83a816a7a2b058dd /arch/mips/au1000/common/reset.c
parent8d2d91e86b4153cc2305ec86fe908048f459ff7f (diff)
MIPS: Alchemy: rename directory
It's more than the au1000 these days. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000/common/reset.c')
-rw-r--r--arch/mips/au1000/common/reset.c189
1 files changed, 0 insertions, 189 deletions
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
deleted file mode 100644
index d555429c8d6f..000000000000
--- a/arch/mips/au1000/common/reset.c
+++ /dev/null
@@ -1,189 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Au1xx0 reset routines.
5 *
6 * Copyright 2001, 2006, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <asm/cacheflush.h>
31
32#include <asm/mach-au1x00/au1000.h>
33
34extern int au_sleep(void);
35
36void au1000_restart(char *command)
37{
38 /* Set all integrated peripherals to disabled states */
39 extern void board_reset(void);
40 u32 prid = read_c0_prid();
41
42 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
43
44 switch (prid & 0xFF000000) {
45 case 0x00000000: /* Au1000 */
46 au_writel(0x02, 0xb0000010); /* ac97_enable */
47 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
48 asm("sync");
49 au_writel(0x00, 0xb017fffc); /* usbh_enable */
50 au_writel(0x00, 0xb0200058); /* usbd_enable */
51 au_writel(0x00, 0xb0300040); /* ir_enable */
52 au_writel(0x00, 0xb4004104); /* mac dma */
53 au_writel(0x00, 0xb4004114); /* mac dma */
54 au_writel(0x00, 0xb4004124); /* mac dma */
55 au_writel(0x00, 0xb4004134); /* mac dma */
56 au_writel(0x00, 0xb0520000); /* macen0 */
57 au_writel(0x00, 0xb0520004); /* macen1 */
58 au_writel(0x00, 0xb1000008); /* i2s_enable */
59 au_writel(0x00, 0xb1100100); /* uart0_enable */
60 au_writel(0x00, 0xb1200100); /* uart1_enable */
61 au_writel(0x00, 0xb1300100); /* uart2_enable */
62 au_writel(0x00, 0xb1400100); /* uart3_enable */
63 au_writel(0x02, 0xb1600100); /* ssi0_enable */
64 au_writel(0x02, 0xb1680100); /* ssi1_enable */
65 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
66 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
67 au_writel(0x00, 0xb1900028); /* sys_clksrc */
68 au_writel(0x10, 0xb1900060); /* sys_cpupll */
69 au_writel(0x00, 0xb1900064); /* sys_auxpll */
70 au_writel(0x00, 0xb1900100); /* sys_pininputen */
71 break;
72 case 0x01000000: /* Au1500 */
73 au_writel(0x02, 0xb0000010); /* ac97_enable */
74 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
75 asm("sync");
76 au_writel(0x00, 0xb017fffc); /* usbh_enable */
77 au_writel(0x00, 0xb0200058); /* usbd_enable */
78 au_writel(0x00, 0xb4004104); /* mac dma */
79 au_writel(0x00, 0xb4004114); /* mac dma */
80 au_writel(0x00, 0xb4004124); /* mac dma */
81 au_writel(0x00, 0xb4004134); /* mac dma */
82 au_writel(0x00, 0xb1520000); /* macen0 */
83 au_writel(0x00, 0xb1520004); /* macen1 */
84 au_writel(0x00, 0xb1100100); /* uart0_enable */
85 au_writel(0x00, 0xb1400100); /* uart3_enable */
86 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
87 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
88 au_writel(0x00, 0xb1900028); /* sys_clksrc */
89 au_writel(0x10, 0xb1900060); /* sys_cpupll */
90 au_writel(0x00, 0xb1900064); /* sys_auxpll */
91 au_writel(0x00, 0xb1900100); /* sys_pininputen */
92 break;
93 case 0x02000000: /* Au1100 */
94 au_writel(0x02, 0xb0000010); /* ac97_enable */
95 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
96 asm("sync");
97 au_writel(0x00, 0xb017fffc); /* usbh_enable */
98 au_writel(0x00, 0xb0200058); /* usbd_enable */
99 au_writel(0x00, 0xb0300040); /* ir_enable */
100 au_writel(0x00, 0xb4004104); /* mac dma */
101 au_writel(0x00, 0xb4004114); /* mac dma */
102 au_writel(0x00, 0xb4004124); /* mac dma */
103 au_writel(0x00, 0xb4004134); /* mac dma */
104 au_writel(0x00, 0xb0520000); /* macen0 */
105 au_writel(0x00, 0xb1000008); /* i2s_enable */
106 au_writel(0x00, 0xb1100100); /* uart0_enable */
107 au_writel(0x00, 0xb1200100); /* uart1_enable */
108 au_writel(0x00, 0xb1400100); /* uart3_enable */
109 au_writel(0x02, 0xb1600100); /* ssi0_enable */
110 au_writel(0x02, 0xb1680100); /* ssi1_enable */
111 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
112 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
113 au_writel(0x00, 0xb1900028); /* sys_clksrc */
114 au_writel(0x10, 0xb1900060); /* sys_cpupll */
115 au_writel(0x00, 0xb1900064); /* sys_auxpll */
116 au_writel(0x00, 0xb1900100); /* sys_pininputen */
117 break;
118 case 0x03000000: /* Au1550 */
119 au_writel(0x00, 0xb1a00004); /* psc 0 */
120 au_writel(0x00, 0xb1b00004); /* psc 1 */
121 au_writel(0x00, 0xb0a00004); /* psc 2 */
122 au_writel(0x00, 0xb0b00004); /* psc 3 */
123 au_writel(0x00, 0xb017fffc); /* usbh_enable */
124 au_writel(0x00, 0xb0200058); /* usbd_enable */
125 au_writel(0x00, 0xb4004104); /* mac dma */
126 au_writel(0x00, 0xb4004114); /* mac dma */
127 au_writel(0x00, 0xb4004124); /* mac dma */
128 au_writel(0x00, 0xb4004134); /* mac dma */
129 au_writel(0x00, 0xb1520000); /* macen0 */
130 au_writel(0x00, 0xb1520004); /* macen1 */
131 au_writel(0x00, 0xb1100100); /* uart0_enable */
132 au_writel(0x00, 0xb1200100); /* uart1_enable */
133 au_writel(0x00, 0xb1400100); /* uart3_enable */
134 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
135 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
136 au_writel(0x00, 0xb1900028); /* sys_clksrc */
137 au_writel(0x10, 0xb1900060); /* sys_cpupll */
138 au_writel(0x00, 0xb1900064); /* sys_auxpll */
139 au_writel(0x00, 0xb1900100); /* sys_pininputen */
140 break;
141 }
142
143 set_c0_status(ST0_BEV | ST0_ERL);
144 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
145 flush_cache_all();
146 write_c0_wired(0);
147
148 /* Give board a chance to do a hardware reset */
149 board_reset();
150
151 /* Jump to the beggining in case board_reset() is empty */
152 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
153}
154
155void au1000_halt(void)
156{
157#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
158 /* Power off system */
159 printk(KERN_NOTICE "\n** Powering off...\n");
160 au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);
161 au_sync();
162 while (1); /* should not get here */
163#else
164 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
165#ifdef CONFIG_MIPS_MIRAGE
166 au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
167#endif
168#ifdef CONFIG_MIPS_DB1200
169 au_writew(au_readw(0xB980001C) | (1 << 14), 0xB980001C);
170#endif
171#ifdef CONFIG_PM
172 au_sleep();
173
174 /* Should not get here */
175 printk(KERN_ERR "Unable to put CPU in sleep mode\n");
176 while (1);
177#else
178 while (1)
179 __asm__(".set\tmips3\n\t"
180 "wait\n\t"
181 ".set\tmips0");
182#endif
183#endif /* defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) */
184}
185
186void au1000_power_off(void)
187{
188 au1000_halt();
189}
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