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authorGabor Juhos <juhosg@openwrt.org>2013-02-15 13:54:33 -0500
committerJohn Crispin <blogic@openwrt.org>2013-02-19 03:36:30 -0500
commite9c0d0aaa3a7a6e66135e8b44f3323143a635098 (patch)
treef23b710db00663421acf53b43ff084a3f30a168a /arch/mips/ath79
parent13992303fa705ae1e4acf4660c69687672996029 (diff)
MIPS: ath79: add WMAC registration code for the QCA955X SoCs
The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/ath79')
-rw-r--r--arch/mips/ath79/Kconfig2
-rw-r--r--arch/mips/ath79/dev-wmac.c20
2 files changed, 21 insertions, 1 deletions
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index cffdc8e3b63b..77926e331b17 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -108,7 +108,7 @@ config ATH79_DEV_USB
108 def_bool n 108 def_bool n
109 109
110config ATH79_DEV_WMAC 110config ATH79_DEV_WMAC
111 depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X) 111 depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
112 def_bool n 112 def_bool n
113 113
114endif 114endif
diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c
index d71d745e3109..da190b1b87ce 100644
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void)
116 ath79_wmac_data.is_clk_25mhz = true; 116 ath79_wmac_data.is_clk_25mhz = true;
117} 117}
118 118
119static void qca955x_wmac_setup(void)
120{
121 u32 t;
122
123 ath79_wmac_device.name = "qca955x_wmac";
124
125 ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
126 ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
127 ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
128 ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);
129
130 t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
131 if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
132 ath79_wmac_data.is_clk_25mhz = false;
133 else
134 ath79_wmac_data.is_clk_25mhz = true;
135}
136
119void __init ath79_register_wmac(u8 *cal_data) 137void __init ath79_register_wmac(u8 *cal_data)
120{ 138{
121 if (soc_is_ar913x()) 139 if (soc_is_ar913x())
@@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_data)
124 ar933x_wmac_setup(); 142 ar933x_wmac_setup();
125 else if (soc_is_ar934x()) 143 else if (soc_is_ar934x())
126 ar934x_wmac_setup(); 144 ar934x_wmac_setup();
145 else if (soc_is_qca955x())
146 qca955x_wmac_setup();
127 else 147 else
128 BUG(); 148 BUG();
129 149