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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/arc/promlib.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/mips/arc/promlib.c')
-rw-r--r--arch/mips/arc/promlib.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/mips/arc/promlib.c b/arch/mips/arc/promlib.c
new file mode 100644
index 000000000000..c508c00dbb64
--- /dev/null
+++ b/arch/mips/arc/promlib.c
@@ -0,0 +1,43 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1996 David S. Miller (dm@sgi.com)
7 * Compability with board caches, Ulf Carlsson
8 */
9#include <linux/kernel.h>
10#include <asm/sgialib.h>
11#include <asm/bcache.h>
12
13/*
14 * IP22 boardcache is not compatible with board caches. Thus we disable it
15 * during romvec action. Since r4xx0.c is always compiled and linked with your
16 * kernel, this shouldn't cause any harm regardless what MIPS processor you
17 * have.
18 *
19 * The ARC write and read functions seem to interfere with the serial lines
20 * in some way. You should be careful with them.
21 */
22
23void prom_putchar(char c)
24{
25 ULONG cnt;
26 CHAR it = c;
27
28 bc_disable();
29 ArcWrite(1, &it, 1, &cnt);
30 bc_enable();
31}
32
33char prom_getchar(void)
34{
35 ULONG cnt;
36 CHAR c;
37
38 bc_disable();
39 ArcRead(0, &c, 1, &cnt);
40 bc_enable();
41
42 return c;
43}