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authorAlexander Clouter <alex@digriz.org.uk>2010-01-31 14:38:19 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:53:21 -0500
commit4d1da8c2961da46abd85a71d20f2b169bf80618e (patch)
treeaed10645023213f8f6d3e9334c6c93b1cfed6c72 /arch/mips/ar7/platform.c
parent10229f3761fdc1050f972bf3a4c4623bde20002f (diff)
MIPS: AR7: Whitespace hacking
[Ralf: Fixed up reject and Wu's complaints about comment style.] Signed-off-by: Alexander Clouter <alex@digriz.org.uk> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/921/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ar7/platform.c')
-rw-r--r--arch/mips/ar7/platform.c587
1 files changed, 307 insertions, 280 deletions
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 1db191cd49c3..76a358ec15f0 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -42,39 +42,42 @@
42#include <asm/mach-ar7/gpio.h> 42#include <asm/mach-ar7/gpio.h>
43#include <asm/mach-ar7/prom.h> 43#include <asm/mach-ar7/prom.h>
44 44
45/*****************************************************************************
46 * VLYNQ Bus
47 ****************************************************************************/
45struct plat_vlynq_data { 48struct plat_vlynq_data {
46 struct plat_vlynq_ops ops; 49 struct plat_vlynq_ops ops;
47 int gpio_bit; 50 int gpio_bit;
48 int reset_bit; 51 int reset_bit;
49}; 52};
50 53
51
52static int vlynq_on(struct vlynq_device *dev) 54static int vlynq_on(struct vlynq_device *dev)
53{ 55{
54 int result; 56 int ret;
55 struct plat_vlynq_data *pdata = dev->dev.platform_data; 57 struct plat_vlynq_data *pdata = dev->dev.platform_data;
56 58
57 result = gpio_request(pdata->gpio_bit, "vlynq"); 59 ret = gpio_request(pdata->gpio_bit, "vlynq");
58 if (result) 60 if (ret)
59 goto out; 61 goto out;
60 62
61 ar7_device_reset(pdata->reset_bit); 63 ar7_device_reset(pdata->reset_bit);
62 64
63 result = ar7_gpio_disable(pdata->gpio_bit); 65 ret = ar7_gpio_disable(pdata->gpio_bit);
64 if (result) 66 if (ret)
65 goto out_enabled; 67 goto out_enabled;
66 68
67 result = ar7_gpio_enable(pdata->gpio_bit); 69 ret = ar7_gpio_enable(pdata->gpio_bit);
68 if (result) 70 if (ret)
69 goto out_enabled; 71 goto out_enabled;
70 72
71 result = gpio_direction_output(pdata->gpio_bit, 0); 73 ret = gpio_direction_output(pdata->gpio_bit, 0);
72 if (result) 74 if (ret)
73 goto out_gpio_enabled; 75 goto out_gpio_enabled;
74 76
75 msleep(50); 77 msleep(50);
76 78
77 gpio_set_value(pdata->gpio_bit, 1); 79 gpio_set_value(pdata->gpio_bit, 1);
80
78 msleep(50); 81 msleep(50);
79 82
80 return 0; 83 return 0;
@@ -85,320 +88,384 @@ out_enabled:
85 ar7_device_disable(pdata->reset_bit); 88 ar7_device_disable(pdata->reset_bit);
86 gpio_free(pdata->gpio_bit); 89 gpio_free(pdata->gpio_bit);
87out: 90out:
88 return result; 91 return ret;
89} 92}
90 93
91static void vlynq_off(struct vlynq_device *dev) 94static void vlynq_off(struct vlynq_device *dev)
92{ 95{
93 struct plat_vlynq_data *pdata = dev->dev.platform_data; 96 struct plat_vlynq_data *pdata = dev->dev.platform_data;
97
94 ar7_gpio_disable(pdata->gpio_bit); 98 ar7_gpio_disable(pdata->gpio_bit);
95 gpio_free(pdata->gpio_bit); 99 gpio_free(pdata->gpio_bit);
96 ar7_device_disable(pdata->reset_bit); 100 ar7_device_disable(pdata->reset_bit);
97} 101}
98 102
99static struct resource physmap_flash_resource = { 103static struct resource vlynq_low_res[] = {
100 .name = "mem",
101 .flags = IORESOURCE_MEM,
102 .start = 0x10000000,
103 .end = 0x107fffff,
104};
105
106static struct resource cpmac_low_res[] = {
107 { 104 {
108 .name = "regs", 105 .name = "regs",
109 .flags = IORESOURCE_MEM, 106 .flags = IORESOURCE_MEM,
110 .start = AR7_REGS_MAC0, 107 .start = AR7_REGS_VLYNQ0,
111 .end = AR7_REGS_MAC0 + 0x7ff, 108 .end = AR7_REGS_VLYNQ0 + 0xff,
112 }, 109 },
113 { 110 {
114 .name = "irq", 111 .name = "irq",
115 .flags = IORESOURCE_IRQ, 112 .flags = IORESOURCE_IRQ,
116 .start = 27, 113 .start = 29,
117 .end = 27, 114 .end = 29,
118 }, 115 },
119};
120
121static struct resource cpmac_high_res[] = {
122 { 116 {
123 .name = "regs", 117 .name = "mem",
124 .flags = IORESOURCE_MEM, 118 .flags = IORESOURCE_MEM,
125 .start = AR7_REGS_MAC1, 119 .start = 0x04000000,
126 .end = AR7_REGS_MAC1 + 0x7ff, 120 .end = 0x04ffffff,
127 }, 121 },
128 { 122 {
129 .name = "irq", 123 .name = "devirq",
130 .flags = IORESOURCE_IRQ, 124 .flags = IORESOURCE_IRQ,
131 .start = 41, 125 .start = 80,
132 .end = 41, 126 .end = 111,
133 }, 127 },
134}; 128};
135 129
136static struct resource vlynq_low_res[] = { 130static struct resource vlynq_high_res[] = {
137 { 131 {
138 .name = "regs", 132 .name = "regs",
139 .flags = IORESOURCE_MEM, 133 .flags = IORESOURCE_MEM,
140 .start = AR7_REGS_VLYNQ0, 134 .start = AR7_REGS_VLYNQ1,
141 .end = AR7_REGS_VLYNQ0 + 0xff, 135 .end = AR7_REGS_VLYNQ1 + 0xff,
142 }, 136 },
143 { 137 {
144 .name = "irq", 138 .name = "irq",
145 .flags = IORESOURCE_IRQ, 139 .flags = IORESOURCE_IRQ,
146 .start = 29, 140 .start = 33,
147 .end = 29, 141 .end = 33,
148 }, 142 },
149 { 143 {
150 .name = "mem", 144 .name = "mem",
151 .flags = IORESOURCE_MEM, 145 .flags = IORESOURCE_MEM,
152 .start = 0x04000000, 146 .start = 0x0c000000,
153 .end = 0x04ffffff, 147 .end = 0x0cffffff,
154 }, 148 },
155 { 149 {
156 .name = "devirq", 150 .name = "devirq",
157 .flags = IORESOURCE_IRQ, 151 .flags = IORESOURCE_IRQ,
158 .start = 80, 152 .start = 112,
159 .end = 111, 153 .end = 143,
160 }, 154 },
161}; 155};
162 156
163static struct resource vlynq_high_res[] = { 157static struct plat_vlynq_data vlynq_low_data = {
164 { 158 .ops = {
165 .name = "regs", 159 .on = vlynq_on,
166 .flags = IORESOURCE_MEM, 160 .off = vlynq_off,
167 .start = AR7_REGS_VLYNQ1,
168 .end = AR7_REGS_VLYNQ1 + 0xff,
169 }, 161 },
170 { 162 .reset_bit = 20,
171 .name = "irq", 163 .gpio_bit = 18,
172 .flags = IORESOURCE_IRQ, 164};
173 .start = 33, 165
174 .end = 33, 166static struct plat_vlynq_data vlynq_high_data = {
167 .ops = {
168 .on = vlynq_on,
169 .off = vlynq_off,
175 }, 170 },
176 { 171 .reset_bit = 26,
177 .name = "mem", 172 .gpio_bit = 19,
178 .flags = IORESOURCE_MEM, 173};
179 .start = 0x0c000000, 174
180 .end = 0x0cffffff, 175static struct platform_device vlynq_low = {
176 .id = 0,
177 .name = "vlynq",
178 .dev = {
179 .platform_data = &vlynq_low_data,
181 }, 180 },
182 { 181 .resource = vlynq_low_res,
183 .name = "devirq", 182 .num_resources = ARRAY_SIZE(vlynq_low_res),
184 .flags = IORESOURCE_IRQ, 183};
185 .start = 112, 184
186 .end = 143, 185static struct platform_device vlynq_high = {
186 .id = 1,
187 .name = "vlynq",
188 .dev = {
189 .platform_data = &vlynq_high_data,
187 }, 190 },
191 .resource = vlynq_high_res,
192 .num_resources = ARRAY_SIZE(vlynq_high_res),
188}; 193};
189 194
190static struct resource usb_res[] = { 195/*****************************************************************************
191 { 196 * Flash
192 .name = "regs", 197 ****************************************************************************/
193 .flags = IORESOURCE_MEM, 198static struct resource physmap_flash_resource = {
194 .start = AR7_REGS_USB, 199 .name = "mem",
195 .end = AR7_REGS_USB + 0xff, 200 .flags = IORESOURCE_MEM,
201 .start = 0x10000000,
202 .end = 0x107fffff,
203};
204
205static struct physmap_flash_data physmap_flash_data = {
206 .width = 2,
207};
208
209static struct platform_device physmap_flash = {
210 .name = "physmap-flash",
211 .dev = {
212 .platform_data = &physmap_flash_data,
196 }, 213 },
214 .resource = &physmap_flash_resource,
215 .num_resources = 1,
216};
217
218/*****************************************************************************
219 * Ethernet
220 ****************************************************************************/
221static struct resource cpmac_low_res[] = {
197 { 222 {
198 .name = "irq", 223 .name = "regs",
199 .flags = IORESOURCE_IRQ, 224 .flags = IORESOURCE_MEM,
200 .start = 32, 225 .start = AR7_REGS_MAC0,
201 .end = 32, 226 .end = AR7_REGS_MAC0 + 0x7ff,
202 }, 227 },
203 { 228 {
204 .name = "mem", 229 .name = "irq",
205 .flags = IORESOURCE_MEM, 230 .flags = IORESOURCE_IRQ,
206 .start = 0x03400000, 231 .start = 27,
207 .end = 0x03401fff, 232 .end = 27,
208 }, 233 },
209}; 234};
210 235
211static struct physmap_flash_data physmap_flash_data = { 236static struct resource cpmac_high_res[] = {
212 .width = 2, 237 {
238 .name = "regs",
239 .flags = IORESOURCE_MEM,
240 .start = AR7_REGS_MAC1,
241 .end = AR7_REGS_MAC1 + 0x7ff,
242 },
243 {
244 .name = "irq",
245 .flags = IORESOURCE_IRQ,
246 .start = 41,
247 .end = 41,
248 },
213}; 249};
214 250
215static struct fixed_phy_status fixed_phy_status __initdata = { 251static struct fixed_phy_status fixed_phy_status __initdata = {
216 .link = 1, 252 .link = 1,
217 .speed = 100, 253 .speed = 100,
218 .duplex = 1, 254 .duplex = 1,
219}; 255};
220 256
221static struct plat_cpmac_data cpmac_low_data = { 257static struct plat_cpmac_data cpmac_low_data = {
222 .reset_bit = 17, 258 .reset_bit = 17,
223 .power_bit = 20, 259 .power_bit = 20,
224 .phy_mask = 0x80000000, 260 .phy_mask = 0x80000000,
225}; 261};
226 262
227static struct plat_cpmac_data cpmac_high_data = { 263static struct plat_cpmac_data cpmac_high_data = {
228 .reset_bit = 21, 264 .reset_bit = 21,
229 .power_bit = 22, 265 .power_bit = 22,
230 .phy_mask = 0x7fffffff, 266 .phy_mask = 0x7fffffff,
231};
232
233static struct plat_vlynq_data vlynq_low_data = {
234 .ops.on = vlynq_on,
235 .ops.off = vlynq_off,
236 .reset_bit = 20,
237 .gpio_bit = 18,
238};
239
240static struct plat_vlynq_data vlynq_high_data = {
241 .ops.on = vlynq_on,
242 .ops.off = vlynq_off,
243 .reset_bit = 16,
244 .gpio_bit = 19,
245};
246
247static struct platform_device physmap_flash = {
248 .id = 0,
249 .name = "physmap-flash",
250 .dev.platform_data = &physmap_flash_data,
251 .resource = &physmap_flash_resource,
252 .num_resources = 1,
253}; 267};
254 268
255static u64 cpmac_dma_mask = DMA_BIT_MASK(32); 269static u64 cpmac_dma_mask = DMA_BIT_MASK(32);
270
256static struct platform_device cpmac_low = { 271static struct platform_device cpmac_low = {
257 .id = 0, 272 .id = 0,
258 .name = "cpmac", 273 .name = "cpmac",
259 .dev = { 274 .dev = {
260 .dma_mask = &cpmac_dma_mask, 275 .dma_mask = &cpmac_dma_mask,
261 .coherent_dma_mask = DMA_BIT_MASK(32), 276 .coherent_dma_mask = DMA_BIT_MASK(32),
262 .platform_data = &cpmac_low_data, 277 .platform_data = &cpmac_low_data,
263 }, 278 },
264 .resource = cpmac_low_res, 279 .resource = cpmac_low_res,
265 .num_resources = ARRAY_SIZE(cpmac_low_res), 280 .num_resources = ARRAY_SIZE(cpmac_low_res),
266}; 281};
267 282
268static struct platform_device cpmac_high = { 283static struct platform_device cpmac_high = {
269 .id = 1, 284 .id = 1,
270 .name = "cpmac", 285 .name = "cpmac",
271 .dev = { 286 .dev = {
272 .dma_mask = &cpmac_dma_mask, 287 .dma_mask = &cpmac_dma_mask,
273 .coherent_dma_mask = DMA_BIT_MASK(32), 288 .coherent_dma_mask = DMA_BIT_MASK(32),
274 .platform_data = &cpmac_high_data, 289 .platform_data = &cpmac_high_data,
275 }, 290 },
276 .resource = cpmac_high_res, 291 .resource = cpmac_high_res,
277 .num_resources = ARRAY_SIZE(cpmac_high_res), 292 .num_resources = ARRAY_SIZE(cpmac_high_res),
278}; 293};
279 294
280static struct platform_device vlynq_low = { 295static inline unsigned char char2hex(char h)
281 .id = 0, 296{
282 .name = "vlynq", 297 switch (h) {
283 .dev.platform_data = &vlynq_low_data, 298 case '0': case '1': case '2': case '3': case '4':
284 .resource = vlynq_low_res, 299 case '5': case '6': case '7': case '8': case '9':
285 .num_resources = ARRAY_SIZE(vlynq_low_res), 300 return h - '0';
286}; 301 case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
302 return h - 'A' + 10;
303 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
304 return h - 'a' + 10;
305 default:
306 return 0;
307 }
308}
287 309
288static struct platform_device vlynq_high = { 310static void cpmac_get_mac(int instance, unsigned char *dev_addr)
289 .id = 1, 311{
290 .name = "vlynq", 312 int i;
291 .dev.platform_data = &vlynq_high_data, 313 char name[5], default_mac[ETH_ALEN], *mac;
292 .resource = vlynq_high_res, 314
293 .num_resources = ARRAY_SIZE(vlynq_high_res), 315 mac = NULL;
316 sprintf(name, "mac%c", 'a' + instance);
317 mac = prom_getenv(name);
318 if (!mac) {
319 sprintf(name, "mac%c", 'a');
320 mac = prom_getenv(name);
321 }
322 if (!mac) {
323 random_ether_addr(default_mac);
324 mac = default_mac;
325 }
326 for (i = 0; i < 6; i++)
327 dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
328 char2hex(mac[i * 3 + 1]);
329}
330
331/*****************************************************************************
332 * USB
333 ****************************************************************************/
334static struct resource usb_res[] = {
335 {
336 .name = "regs",
337 .flags = IORESOURCE_MEM,
338 .start = AR7_REGS_USB,
339 .end = AR7_REGS_USB + 0xff,
340 },
341 {
342 .name = "irq",
343 .flags = IORESOURCE_IRQ,
344 .start = 32,
345 .end = 32,
346 },
347 {
348 .name = "mem",
349 .flags = IORESOURCE_MEM,
350 .start = 0x03400000,
351 .end = 0x034001fff,
352 },
294}; 353};
295 354
355static struct platform_device ar7_udc = {
356 .name = "ar7_udc",
357 .resource = usb_res,
358 .num_resources = ARRAY_SIZE(usb_res),
359};
296 360
361/*****************************************************************************
362 * LEDs
363 ****************************************************************************/
297static struct gpio_led default_leds[] = { 364static struct gpio_led default_leds[] = {
298 { 365 {
299 .name = "status", 366 .name = "status",
300 .gpio = 8, 367 .gpio = 8,
301 .active_low = 1, 368 .active_low = 1,
302 }, 369 },
303}; 370};
304 371
305static struct gpio_led dsl502t_leds[] = { 372static struct gpio_led dsl502t_leds[] = {
306 { 373 {
307 .name = "status", 374 .name = "status",
308 .gpio = 9, 375 .gpio = 9,
309 .active_low = 1, 376 .active_low = 1,
310 }, 377 },
311 { 378 {
312 .name = "ethernet", 379 .name = "ethernet",
313 .gpio = 7, 380 .gpio = 7,
314 .active_low = 1, 381 .active_low = 1,
315 }, 382 },
316 { 383 {
317 .name = "usb", 384 .name = "usb",
318 .gpio = 12, 385 .gpio = 12,
319 .active_low = 1, 386 .active_low = 1,
320 }, 387 },
321}; 388};
322 389
323static struct gpio_led dg834g_leds[] = { 390static struct gpio_led dg834g_leds[] = {
324 { 391 {
325 .name = "ppp", 392 .name = "ppp",
326 .gpio = 6, 393 .gpio = 6,
327 .active_low = 1, 394 .active_low = 1,
328 }, 395 },
329 { 396 {
330 .name = "status", 397 .name = "status",
331 .gpio = 7, 398 .gpio = 7,
332 .active_low = 1, 399 .active_low = 1,
333 }, 400 },
334 { 401 {
335 .name = "adsl", 402 .name = "adsl",
336 .gpio = 8, 403 .gpio = 8,
337 .active_low = 1, 404 .active_low = 1,
338 }, 405 },
339 { 406 {
340 .name = "wifi", 407 .name = "wifi",
341 .gpio = 12, 408 .gpio = 12,
342 .active_low = 1, 409 .active_low = 1,
343 }, 410 },
344 { 411 {
345 .name = "power", 412 .name = "power",
346 .gpio = 14, 413 .gpio = 14,
347 .active_low = 1, 414 .active_low = 1,
348 .default_trigger = "default-on", 415 .default_trigger = "default-on",
349 }, 416 },
350}; 417};
351 418
352static struct gpio_led fb_sl_leds[] = { 419static struct gpio_led fb_sl_leds[] = {
353 { 420 {
354 .name = "1", 421 .name = "1",
355 .gpio = 7, 422 .gpio = 7,
356 }, 423 },
357 { 424 {
358 .name = "2", 425 .name = "2",
359 .gpio = 13, 426 .gpio = 13,
360 .active_low = 1, 427 .active_low = 1,
361 }, 428 },
362 { 429 {
363 .name = "3", 430 .name = "3",
364 .gpio = 10, 431 .gpio = 10,
365 .active_low = 1, 432 .active_low = 1,
366 }, 433 },
367 { 434 {
368 .name = "4", 435 .name = "4",
369 .gpio = 12, 436 .gpio = 12,
370 .active_low = 1, 437 .active_low = 1,
371 }, 438 },
372 { 439 {
373 .name = "5", 440 .name = "5",
374 .gpio = 9, 441 .gpio = 9,
375 .active_low = 1, 442 .active_low = 1,
376 }, 443 },
377}; 444};
378 445
379static struct gpio_led fb_fon_leds[] = { 446static struct gpio_led fb_fon_leds[] = {
380 { 447 {
381 .name = "1", 448 .name = "1",
382 .gpio = 8, 449 .gpio = 8,
383 }, 450 },
384 { 451 {
385 .name = "2", 452 .name = "2",
386 .gpio = 3, 453 .gpio = 3,
387 .active_low = 1, 454 .active_low = 1,
388 }, 455 },
389 { 456 {
390 .name = "3", 457 .name = "3",
391 .gpio = 5, 458 .gpio = 5,
392 }, 459 },
393 { 460 {
394 .name = "4", 461 .name = "4",
395 .gpio = 4, 462 .gpio = 4,
396 .active_low = 1, 463 .active_low = 1,
397 }, 464 },
398 { 465 {
399 .name = "5", 466 .name = "5",
400 .gpio = 11, 467 .gpio = 11,
401 .active_low = 1, 468 .active_low = 1,
402 }, 469 },
403}; 470};
404 471
@@ -406,69 +473,11 @@ static struct gpio_led_platform_data ar7_led_data;
406 473
407static struct platform_device ar7_gpio_leds = { 474static struct platform_device ar7_gpio_leds = {
408 .name = "leds-gpio", 475 .name = "leds-gpio",
409 .id = -1,
410 .dev = { 476 .dev = {
411 .platform_data = &ar7_led_data, 477 .platform_data = &ar7_led_data,
412 } 478 }
413}; 479};
414 480
415static struct platform_device ar7_udc = {
416 .id = -1,
417 .name = "ar7_udc",
418 .resource = usb_res,
419 .num_resources = ARRAY_SIZE(usb_res),
420};
421
422static struct resource ar7_wdt_res = {
423 .name = "regs",
424 .start = -1, /* Filled at runtime */
425 .end = -1, /* Filled at runtime */
426 .flags = IORESOURCE_MEM,
427};
428
429static struct platform_device ar7_wdt = {
430 .id = -1,
431 .name = "ar7_wdt",
432 .resource = &ar7_wdt_res,
433 .num_resources = 1,
434};
435
436static inline unsigned char char2hex(char h)
437{
438 switch (h) {
439 case '0': case '1': case '2': case '3': case '4':
440 case '5': case '6': case '7': case '8': case '9':
441 return h - '0';
442 case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
443 return h - 'A' + 10;
444 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
445 return h - 'a' + 10;
446 default:
447 return 0;
448 }
449}
450
451static void cpmac_get_mac(int instance, unsigned char *dev_addr)
452{
453 int i;
454 char name[5], default_mac[ETH_ALEN], *mac;
455
456 mac = NULL;
457 sprintf(name, "mac%c", 'a' + instance);
458 mac = prom_getenv(name);
459 if (!mac) {
460 sprintf(name, "mac%c", 'a');
461 mac = prom_getenv(name);
462 }
463 if (!mac) {
464 random_ether_addr(default_mac);
465 mac = default_mac;
466 }
467 for (i = 0; i < 6; i++)
468 dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
469 char2hex(mac[i * 3 + 1]);
470}
471
472static void __init detect_leds(void) 481static void __init detect_leds(void)
473{ 482{
474 char *prid, *usb_prod; 483 char *prid, *usb_prod;
@@ -501,6 +510,25 @@ static void __init detect_leds(void)
501 } 510 }
502} 511}
503 512
513/*****************************************************************************
514 * Watchdog
515 ****************************************************************************/
516static struct resource ar7_wdt_res = {
517 .name = "regs",
518 .flags = IORESOURCE_MEM,
519 .start = -1, /* Filled at runtime */
520 .end = -1, /* Filled at runtime */
521};
522
523static struct platform_device ar7_wdt = {
524 .name = "ar7_wdt",
525 .resource = &ar7_wdt_res,
526 .num_resources = 1,
527};
528
529/*****************************************************************************
530 * Init
531 ****************************************************************************/
504static int __init ar7_register_devices(void) 532static int __init ar7_register_devices(void)
505{ 533{
506 u16 chip_id; 534 u16 chip_id;
@@ -516,29 +544,28 @@ static int __init ar7_register_devices(void)
516 if (IS_ERR(bus_clk)) 544 if (IS_ERR(bus_clk))
517 panic("unable to get bus clk\n"); 545 panic("unable to get bus clk\n");
518 546
519 uart_port[0].type = PORT_16550A; 547 uart_port[0].type = PORT_16550A;
520 uart_port[0].line = 0; 548 uart_port[0].line = 0;
521 uart_port[0].irq = AR7_IRQ_UART0; 549 uart_port[0].irq = AR7_IRQ_UART0;
522 uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; 550 uart_port[0].uartclk = clk_get_rate(bus_clk) / 2;
523 uart_port[0].iotype = UPIO_MEM32; 551 uart_port[0].iotype = UPIO_MEM32;
524 uart_port[0].mapbase = AR7_REGS_UART0; 552 uart_port[0].mapbase = AR7_REGS_UART0;
525 uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); 553 uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
526 uart_port[0].regshift = 2; 554 uart_port[0].regshift = 2;
527 res = early_serial_setup(&uart_port[0]); 555 res = early_serial_setup(&uart_port[0]);
528 if (res) 556 if (res)
529 return res; 557 return res;
530 558
531
532 /* Only TNETD73xx have a second serial port */ 559 /* Only TNETD73xx have a second serial port */
533 if (ar7_has_second_uart()) { 560 if (ar7_has_second_uart()) {
534 uart_port[1].type = PORT_16550A; 561 uart_port[1].type = PORT_16550A;
535 uart_port[1].line = 1; 562 uart_port[1].line = 1;
536 uart_port[1].irq = AR7_IRQ_UART1; 563 uart_port[1].irq = AR7_IRQ_UART1;
537 uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; 564 uart_port[1].uartclk = clk_get_rate(bus_clk) / 2;
538 uart_port[1].iotype = UPIO_MEM32; 565 uart_port[1].iotype = UPIO_MEM32;
539 uart_port[1].mapbase = UR8_REGS_UART1; 566 uart_port[1].mapbase = UR8_REGS_UART1;
540 uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); 567 uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
541 uart_port[1].regshift = 2; 568 uart_port[1].regshift = 2;
542 res = early_serial_setup(&uart_port[1]); 569 res = early_serial_setup(&uart_port[1]);
543 if (res) 570 if (res)
544 return res; 571 return res;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 14:19:52 -0500