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authorWolfgang Grandegger <wg@grandegger.com>2010-07-15 05:21:23 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-08-05 08:26:09 -0400
commitcb8f55b9207df96ccc332748eb3d154cd2e8014f (patch)
tree7bb11d3b2b30daa660f8c040472b498d90b5bf74 /arch/mips/alchemy
parentf66736532a6bc593a2d7cda68835a79c23836f1b (diff)
MIPS: Alchemy: Add basic support for the GPR board
From: Wolfgang Grandegger <wg@denx.de> Add basic support for the General Purpose Router (GPR) board from Trapeze ITS. Signed-off-by: Wolfgang Grandegger <wg@denx.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1460/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/Kconfig9
-rw-r--r--arch/mips/alchemy/Platform5
-rw-r--r--arch/mips/alchemy/gpr/Makefile8
-rw-r--r--arch/mips/alchemy/gpr/board_setup.c93
-rw-r--r--arch/mips/alchemy/gpr/init.c63
-rw-r--r--arch/mips/alchemy/gpr/platform.c183
6 files changed, 361 insertions, 0 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 1179c4d4cf15..2ccfd4a135bc 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -128,6 +128,15 @@ config MIPS_XXS1500
128 select SYS_SUPPORTS_LITTLE_ENDIAN 128 select SYS_SUPPORTS_LITTLE_ENDIAN
129 select SYS_HAS_EARLY_PRINTK 129 select SYS_HAS_EARLY_PRINTK
130 130
131config MIPS_GPR
132 bool "Trapeze ITS GPR board"
133 select SOC_AU1550
134 select HW_HAS_PCI
135 select DMA_NONCOHERENT
136 select MIPS_DISABLE_OBSOLETE_IDE
137 select SYS_SUPPORTS_LITTLE_ENDIAN
138 select SYS_HAS_EARLY_PRINTK
139
131endchoice 140endchoice
132 141
133config SOC_AU1000 142config SOC_AU1000
diff --git a/arch/mips/alchemy/Platform b/arch/mips/alchemy/Platform
index 0bf2b09f3105..96e9e41f1b2a 100644
--- a/arch/mips/alchemy/Platform
+++ b/arch/mips/alchemy/Platform
@@ -100,6 +100,11 @@ load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
100platform-$(CONFIG_MIPS_XXS1500) += alchemy/xxs1500/ 100platform-$(CONFIG_MIPS_XXS1500) += alchemy/xxs1500/
101load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 101load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
102 102
103#
104# Trapeze ITS GRP board
105#
106platform-$(CONFIG_MIPS_GPR) += alchemy/gpr/
107load-$(CONFIG_MIPS_GPR) += 0xffffffff80100000
103 108
104# boards can specify their own <gpio.h> in one of their include dirs. 109# boards can specify their own <gpio.h> in one of their include dirs.
105# If they do, placing this line here at the end will make sure the 110# If they do, placing this line here at the end will make sure the
diff --git a/arch/mips/alchemy/gpr/Makefile b/arch/mips/alchemy/gpr/Makefile
new file mode 100644
index 000000000000..cb73fe256dce
--- /dev/null
+++ b/arch/mips/alchemy/gpr/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2003 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for Trapeze ITS GPR board.
6#
7
8obj-y += board_setup.o init.o platform.o
diff --git a/arch/mips/alchemy/gpr/board_setup.c b/arch/mips/alchemy/gpr/board_setup.c
new file mode 100644
index 000000000000..ad2e3f137933
--- /dev/null
+++ b/arch/mips/alchemy/gpr/board_setup.c
@@ -0,0 +1,93 @@
1/*
2 * Copyright 2010 Wolfgang Grandegger <wg@denx.de>
3 *
4 * Copyright 2000-2003, 2008 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/gpio.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/delay.h>
32#include <linux/pm.h>
33
34#include <asm/reboot.h>
35#include <asm/mach-au1x00/au1000.h>
36
37#include <prom.h>
38
39#define UART1_ADDR KSEG1ADDR(UART1_PHYS_ADDR)
40#define UART3_ADDR KSEG1ADDR(UART3_PHYS_ADDR)
41
42char irq_tab_alchemy[][5] __initdata = {
43 [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff },
44};
45
46static void gpr_reset(char *c)
47{
48 /* switch System-LED to orange (red# and green# on) */
49 alchemy_gpio_direction_output(4, 0);
50 alchemy_gpio_direction_output(5, 0);
51
52 /* trigger watchdog to reset board in 200ms */
53 printk(KERN_EMERG "Triggering watchdog soft reset...\n");
54 raw_local_irq_disable();
55 alchemy_gpio_direction_output(1, 0);
56 udelay(1);
57 alchemy_gpio_set_value(1, 1);
58 while (1)
59 cpu_wait();
60}
61
62static void gpr_power_off(void)
63{
64 while (1)
65 cpu_wait();
66}
67
68void __init board_setup(void)
69{
70 printk(KERN_INFO "Tarpeze ITS GPR board\n");
71
72 pm_power_off = gpr_power_off;
73 _machine_halt = gpr_power_off;
74 _machine_restart = gpr_reset;
75
76 /* Enable UART3 */
77 au_writel(0x1, UART3_ADDR + UART_MOD_CNTRL);/* clock enable (CE) */
78 au_writel(0x3, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
79 /* Enable UART1 */
80 au_writel(0x1, UART1_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
81 au_writel(0x3, UART1_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
82
83 /* Take away Reset of UMTS-card */
84 alchemy_gpio_direction_output(215, 1);
85
86#ifdef CONFIG_PCI
87#if defined(__MIPSEB__)
88 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
89#else
90 au_writel(0xf, Au1500_PCI_CFG);
91#endif
92#endif
93}
diff --git a/arch/mips/alchemy/gpr/init.c b/arch/mips/alchemy/gpr/init.c
new file mode 100644
index 000000000000..f044f4c541d7
--- /dev/null
+++ b/arch/mips/alchemy/gpr/init.c
@@ -0,0 +1,63 @@
1/*
2 * Copyright 2010 Wolfgang Grandegger <wg@denx.de>
3 *
4 * Copyright 2003, 2008 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/kernel.h>
30
31#include <asm/bootinfo.h>
32#include <asm/mach-au1x00/au1000.h>
33
34#include <prom.h>
35
36const char *get_system_type(void)
37{
38 return "GPR";
39}
40
41void __init prom_init(void)
42{
43 unsigned char *memsize_str;
44 unsigned long memsize;
45
46 prom_argc = fw_arg0;
47 prom_argv = (char **)fw_arg1;
48 prom_envp = (char **)fw_arg2;
49
50 prom_init_cmdline();
51
52 memsize_str = prom_getenv("memsize");
53 if (!memsize_str)
54 memsize = 0x04000000;
55 else
56 strict_strtoul(memsize_str, 0, &memsize);
57 add_memory_region(0, memsize, BOOT_MEM_RAM);
58}
59
60void prom_putchar(unsigned char c)
61{
62 alchemy_uart_putchar(UART0_PHYS_ADDR, c);
63}
diff --git a/arch/mips/alchemy/gpr/platform.c b/arch/mips/alchemy/gpr/platform.c
new file mode 100644
index 000000000000..14b46629cfc8
--- /dev/null
+++ b/arch/mips/alchemy/gpr/platform.c
@@ -0,0 +1,183 @@
1/*
2 * GPR board platform device registration
3 *
4 * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/mtd/partitions.h>
24#include <linux/mtd/physmap.h>
25#include <linux/leds.h>
26#include <linux/gpio.h>
27#include <linux/i2c.h>
28#include <linux/i2c-gpio.h>
29
30#include <asm/mach-au1x00/au1000.h>
31
32/*
33 * Watchdog
34 */
35static struct resource gpr_wdt_resource[] = {
36 [0] = {
37 .start = 1,
38 .end = 1,
39 .name = "gpr-adm6320-wdt",
40 .flags = IORESOURCE_IRQ,
41 }
42};
43
44static struct platform_device gpr_wdt_device = {
45 .name = "adm6320-wdt",
46 .id = 0,
47 .num_resources = ARRAY_SIZE(gpr_wdt_resource),
48 .resource = gpr_wdt_resource,
49};
50
51/*
52 * FLASH
53 *
54 * 0x00000000-0x00200000 : "kernel"
55 * 0x00200000-0x00a00000 : "rootfs"
56 * 0x01d00000-0x01f00000 : "config"
57 * 0x01c00000-0x01d00000 : "yamon"
58 * 0x01d00000-0x01d40000 : "yamon env vars"
59 * 0x00000000-0x00a00000 : "kernel+rootfs"
60 */
61static struct mtd_partition gpr_mtd_partitions[] = {
62 {
63 .name = "kernel",
64 .size = 0x00200000,
65 .offset = 0,
66 },
67 {
68 .name = "rootfs",
69 .size = 0x00800000,
70 .offset = MTDPART_OFS_APPEND,
71 .mask_flags = MTD_WRITEABLE,
72 },
73 {
74 .name = "config",
75 .size = 0x00200000,
76 .offset = 0x01d00000,
77 },
78 {
79 .name = "yamon",
80 .size = 0x00100000,
81 .offset = 0x01c00000,
82 },
83 {
84 .name = "yamon env vars",
85 .size = 0x00040000,
86 .offset = MTDPART_OFS_APPEND,
87 },
88 {
89 .name = "kernel+rootfs",
90 .size = 0x00a00000,
91 .offset = 0,
92 },
93};
94
95static struct physmap_flash_data gpr_flash_data = {
96 .width = 4,
97 .nr_parts = ARRAY_SIZE(gpr_mtd_partitions),
98 .parts = gpr_mtd_partitions,
99};
100
101static struct resource gpr_mtd_resource = {
102 .start = 0x1e000000,
103 .end = 0x1fffffff,
104 .flags = IORESOURCE_MEM,
105};
106
107static struct platform_device gpr_mtd_device = {
108 .name = "physmap-flash",
109 .dev = {
110 .platform_data = &gpr_flash_data,
111 },
112 .num_resources = 1,
113 .resource = &gpr_mtd_resource,
114};
115
116/*
117 * LEDs
118 */
119static struct gpio_led gpr_gpio_leds[] = {
120 { /* green */
121 .name = "gpr:green",
122 .gpio = 4,
123 .active_low = 1,
124 },
125 { /* red */
126 .name = "gpr:red",
127 .gpio = 5,
128 .active_low = 1,
129 }
130};
131
132static struct gpio_led_platform_data gpr_led_data = {
133 .num_leds = ARRAY_SIZE(gpr_gpio_leds),
134 .leds = gpr_gpio_leds,
135};
136
137static struct platform_device gpr_led_devices = {
138 .name = "leds-gpio",
139 .id = -1,
140 .dev = {
141 .platform_data = &gpr_led_data,
142 }
143};
144
145/*
146 * I2C
147 */
148static struct i2c_gpio_platform_data gpr_i2c_data = {
149 .sda_pin = 209,
150 .sda_is_open_drain = 1,
151 .scl_pin = 210,
152 .scl_is_open_drain = 1,
153 .udelay = 2, /* ~100 kHz */
154 .timeout = HZ,
155 };
156
157static struct platform_device gpr_i2c_device = {
158 .name = "i2c-gpio",
159 .id = -1,
160 .dev.platform_data = &gpr_i2c_data,
161};
162
163static struct i2c_board_info gpr_i2c_info[] __initdata = {
164 {
165 I2C_BOARD_INFO("lm83", 0x18),
166 .type = "lm83"
167 }
168};
169
170static struct platform_device *gpr_devices[] __initdata = {
171 &gpr_wdt_device,
172 &gpr_mtd_device,
173 &gpr_i2c_device,
174 &gpr_led_devices,
175};
176
177static int __init gpr_dev_init(void)
178{
179 i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
180
181 return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
182}
183device_initcall(gpr_dev_init);