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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-15 12:49:27 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:52:55 -0500
commit8402a1588a4f63465079e98481dd83d1d9cc9a98 (patch)
tree1ace3c45421fe4b8d29762fcc67bd09064197f18 /arch/mips/alchemy
parent963accbc82a0912b39de39d59e2fd6741db3aa4b (diff)
MIPS: Alchemy: prom_putchar is board dependent
This patch replaces the general alchemy prom_putchar() implementation in favor of board-specific versions: The UART where the output of prom_putchar is directed to really depends on the board, the current implementation hardcodes this on a per-SoC basis which is just wrong. So a generic uart tx function is provided in the alchemy headers, and the boards can provide their own prom_putchar with custom destination uart, and all in-kernel alchemy boards support early printk. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/Kconfig14
-rw-r--r--arch/mips/alchemy/common/Makefile2
-rw-r--r--arch/mips/alchemy/common/puts.c68
-rw-r--r--arch/mips/alchemy/devboards/prom.c5
-rw-r--r--arch/mips/alchemy/mtx-1/init.c6
-rw-r--r--arch/mips/alchemy/xxs1500/init.c6
6 files changed, 32 insertions, 69 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 00b498e97c83..22f4ff5103c1 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -20,12 +20,14 @@ config MIPS_MTX1
20 select HW_HAS_PCI 20 select HW_HAS_PCI
21 select SOC_AU1500 21 select SOC_AU1500
22 select SYS_SUPPORTS_LITTLE_ENDIAN 22 select SYS_SUPPORTS_LITTLE_ENDIAN
23 select SYS_HAS_EARLY_PRINTK
23 24
24config MIPS_BOSPORUS 25config MIPS_BOSPORUS
25 bool "Alchemy Bosporus board" 26 bool "Alchemy Bosporus board"
26 select SOC_AU1500 27 select SOC_AU1500
27 select DMA_NONCOHERENT 28 select DMA_NONCOHERENT
28 select SYS_SUPPORTS_LITTLE_ENDIAN 29 select SYS_SUPPORTS_LITTLE_ENDIAN
30 select SYS_HAS_EARLY_PRINTK
29 31
30config MIPS_DB1000 32config MIPS_DB1000
31 bool "Alchemy DB1000 board" 33 bool "Alchemy DB1000 board"
@@ -33,12 +35,14 @@ config MIPS_DB1000
33 select DMA_NONCOHERENT 35 select DMA_NONCOHERENT
34 select HW_HAS_PCI 36 select HW_HAS_PCI
35 select SYS_SUPPORTS_LITTLE_ENDIAN 37 select SYS_SUPPORTS_LITTLE_ENDIAN
38 select SYS_HAS_EARLY_PRINTK
36 39
37config MIPS_DB1100 40config MIPS_DB1100
38 bool "Alchemy DB1100 board" 41 bool "Alchemy DB1100 board"
39 select SOC_AU1100 42 select SOC_AU1100
40 select DMA_NONCOHERENT 43 select DMA_NONCOHERENT
41 select SYS_SUPPORTS_LITTLE_ENDIAN 44 select SYS_SUPPORTS_LITTLE_ENDIAN
45 select SYS_HAS_EARLY_PRINTK
42 46
43config MIPS_DB1200 47config MIPS_DB1200
44 bool "Alchemy DB1200 board" 48 bool "Alchemy DB1200 board"
@@ -46,6 +50,7 @@ config MIPS_DB1200
46 select DMA_COHERENT 50 select DMA_COHERENT
47 select MIPS_DISABLE_OBSOLETE_IDE 51 select MIPS_DISABLE_OBSOLETE_IDE
48 select SYS_SUPPORTS_LITTLE_ENDIAN 52 select SYS_SUPPORTS_LITTLE_ENDIAN
53 select SYS_HAS_EARLY_PRINTK
49 54
50config MIPS_DB1500 55config MIPS_DB1500
51 bool "Alchemy DB1500 board" 56 bool "Alchemy DB1500 board"
@@ -55,6 +60,7 @@ config MIPS_DB1500
55 select MIPS_DISABLE_OBSOLETE_IDE 60 select MIPS_DISABLE_OBSOLETE_IDE
56 select SYS_SUPPORTS_BIG_ENDIAN 61 select SYS_SUPPORTS_BIG_ENDIAN
57 select SYS_SUPPORTS_LITTLE_ENDIAN 62 select SYS_SUPPORTS_LITTLE_ENDIAN
63 select SYS_HAS_EARLY_PRINTK
58 64
59config MIPS_DB1550 65config MIPS_DB1550
60 bool "Alchemy DB1550 board" 66 bool "Alchemy DB1550 board"
@@ -63,12 +69,14 @@ config MIPS_DB1550
63 select DMA_NONCOHERENT 69 select DMA_NONCOHERENT
64 select MIPS_DISABLE_OBSOLETE_IDE 70 select MIPS_DISABLE_OBSOLETE_IDE
65 select SYS_SUPPORTS_LITTLE_ENDIAN 71 select SYS_SUPPORTS_LITTLE_ENDIAN
72 select SYS_HAS_EARLY_PRINTK
66 73
67config MIPS_MIRAGE 74config MIPS_MIRAGE
68 bool "Alchemy Mirage board" 75 bool "Alchemy Mirage board"
69 select DMA_NONCOHERENT 76 select DMA_NONCOHERENT
70 select SOC_AU1500 77 select SOC_AU1500
71 select SYS_SUPPORTS_LITTLE_ENDIAN 78 select SYS_SUPPORTS_LITTLE_ENDIAN
79 select SYS_HAS_EARLY_PRINTK
72 80
73config MIPS_PB1000 81config MIPS_PB1000
74 bool "Alchemy PB1000 board" 82 bool "Alchemy PB1000 board"
@@ -77,6 +85,7 @@ config MIPS_PB1000
77 select HW_HAS_PCI 85 select HW_HAS_PCI
78 select SWAP_IO_SPACE 86 select SWAP_IO_SPACE
79 select SYS_SUPPORTS_LITTLE_ENDIAN 87 select SYS_SUPPORTS_LITTLE_ENDIAN
88 select SYS_HAS_EARLY_PRINTK
80 89
81config MIPS_PB1100 90config MIPS_PB1100
82 bool "Alchemy PB1100 board" 91 bool "Alchemy PB1100 board"
@@ -85,6 +94,7 @@ config MIPS_PB1100
85 select HW_HAS_PCI 94 select HW_HAS_PCI
86 select SWAP_IO_SPACE 95 select SWAP_IO_SPACE
87 select SYS_SUPPORTS_LITTLE_ENDIAN 96 select SYS_SUPPORTS_LITTLE_ENDIAN
97 select SYS_HAS_EARLY_PRINTK
88 98
89config MIPS_PB1200 99config MIPS_PB1200
90 bool "Alchemy PB1200 board" 100 bool "Alchemy PB1200 board"
@@ -92,6 +102,7 @@ config MIPS_PB1200
92 select DMA_NONCOHERENT 102 select DMA_NONCOHERENT
93 select MIPS_DISABLE_OBSOLETE_IDE 103 select MIPS_DISABLE_OBSOLETE_IDE
94 select SYS_SUPPORTS_LITTLE_ENDIAN 104 select SYS_SUPPORTS_LITTLE_ENDIAN
105 select SYS_HAS_EARLY_PRINTK
95 106
96config MIPS_PB1500 107config MIPS_PB1500
97 bool "Alchemy PB1500 board" 108 bool "Alchemy PB1500 board"
@@ -99,6 +110,7 @@ config MIPS_PB1500
99 select DMA_NONCOHERENT 110 select DMA_NONCOHERENT
100 select HW_HAS_PCI 111 select HW_HAS_PCI
101 select SYS_SUPPORTS_LITTLE_ENDIAN 112 select SYS_SUPPORTS_LITTLE_ENDIAN
113 select SYS_HAS_EARLY_PRINTK
102 114
103config MIPS_PB1550 115config MIPS_PB1550
104 bool "Alchemy PB1550 board" 116 bool "Alchemy PB1550 board"
@@ -107,12 +119,14 @@ config MIPS_PB1550
107 select HW_HAS_PCI 119 select HW_HAS_PCI
108 select MIPS_DISABLE_OBSOLETE_IDE 120 select MIPS_DISABLE_OBSOLETE_IDE
109 select SYS_SUPPORTS_LITTLE_ENDIAN 121 select SYS_SUPPORTS_LITTLE_ENDIAN
122 select SYS_HAS_EARLY_PRINTK
110 123
111config MIPS_XXS1500 124config MIPS_XXS1500
112 bool "MyCable XXS1500 board" 125 bool "MyCable XXS1500 board"
113 select DMA_NONCOHERENT 126 select DMA_NONCOHERENT
114 select SOC_AU1500 127 select SOC_AU1500
115 select SYS_SUPPORTS_LITTLE_ENDIAN 128 select SYS_SUPPORTS_LITTLE_ENDIAN
129 select SYS_HAS_EARLY_PRINTK
116 130
117endchoice 131endchoice
118 132
diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile
index b67fb512529d..abf0eb19051e 100644
--- a/arch/mips/alchemy/common/Makefile
+++ b/arch/mips/alchemy/common/Makefile
@@ -5,7 +5,7 @@
5# Makefile for the Alchemy Au1xx0 CPUs, generic files. 5# Makefile for the Alchemy Au1xx0 CPUs, generic files.
6# 6#
7 7
8obj-y += prom.o irq.o puts.o time.o reset.o \ 8obj-y += prom.o irq.o time.o reset.o \
9 clocks.o platform.o power.o setup.o \ 9 clocks.o platform.o power.o setup.o \
10 sleeper.o dma.o dbdma.o 10 sleeper.o dma.o dbdma.o
11 11
diff --git a/arch/mips/alchemy/common/puts.c b/arch/mips/alchemy/common/puts.c
deleted file mode 100644
index 55bbe24d45b6..000000000000
--- a/arch/mips/alchemy/common/puts.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Low level UART routines to directly access Alchemy UART.
5 *
6 * Copyright 2001, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <asm/mach-au1x00/au1000.h>
31
32#define SERIAL_BASE UART_BASE
33#define SER_CMD 0x7
34#define SER_DATA 0x1
35#define TX_BUSY 0x20
36
37#define TIMEOUT 0xffffff
38#define SLOW_DOWN
39
40static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE;
41
42#ifdef SLOW_DOWN
43static inline void slow_down(void)
44{
45 int k;
46
47 for (k = 0; k < 10000; k++);
48}
49#else
50#define slow_down()
51#endif
52
53void
54prom_putchar(const unsigned char c)
55{
56 unsigned char ch;
57 int i = 0;
58
59 do {
60 ch = com1[SER_CMD];
61 slow_down();
62 i++;
63 if (i > TIMEOUT)
64 break;
65 } while (0 == (ch & TX_BUSY));
66
67 com1[SER_DATA] = c;
68}
diff --git a/arch/mips/alchemy/devboards/prom.c b/arch/mips/alchemy/devboards/prom.c
index 0042bd6b1d7d..b30df5c97ad3 100644
--- a/arch/mips/alchemy/devboards/prom.c
+++ b/arch/mips/alchemy/devboards/prom.c
@@ -60,3 +60,8 @@ void __init prom_init(void)
60 strict_strtoul(memsize_str, 0, &memsize); 60 strict_strtoul(memsize_str, 0, &memsize);
61 add_memory_region(0, memsize, BOOT_MEM_RAM); 61 add_memory_region(0, memsize, BOOT_MEM_RAM);
62} 62}
63
64void prom_putchar(unsigned char c)
65{
66 alchemy_uart_putchar(UART0_PHYS_ADDR, c);
67}
diff --git a/arch/mips/alchemy/mtx-1/init.c b/arch/mips/alchemy/mtx-1/init.c
index 5e871c8d9e96..f8d25575fa05 100644
--- a/arch/mips/alchemy/mtx-1/init.c
+++ b/arch/mips/alchemy/mtx-1/init.c
@@ -32,6 +32,7 @@
32#include <linux/init.h> 32#include <linux/init.h>
33 33
34#include <asm/bootinfo.h> 34#include <asm/bootinfo.h>
35#include <asm/mach-au1x00/au1000.h>
35 36
36#include <prom.h> 37#include <prom.h>
37 38
@@ -58,3 +59,8 @@ void __init prom_init(void)
58 strict_strtoul(memsize_str, 0, &memsize); 59 strict_strtoul(memsize_str, 0, &memsize);
59 add_memory_region(0, memsize, BOOT_MEM_RAM); 60 add_memory_region(0, memsize, BOOT_MEM_RAM);
60} 61}
62
63void prom_putchar(unsigned char c)
64{
65 alchemy_uart_putchar(UART0_PHYS_ADDR, c);
66}
diff --git a/arch/mips/alchemy/xxs1500/init.c b/arch/mips/alchemy/xxs1500/init.c
index 456fa142c093..15125c2fda7d 100644
--- a/arch/mips/alchemy/xxs1500/init.c
+++ b/arch/mips/alchemy/xxs1500/init.c
@@ -30,6 +30,7 @@
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31 31
32#include <asm/bootinfo.h> 32#include <asm/bootinfo.h>
33#include <asm/mach-au1x00/au1000.h>
33 34
34#include <prom.h> 35#include <prom.h>
35 36
@@ -56,3 +57,8 @@ void __init prom_init(void)
56 strict_strtoul(memsize_str, 0, &memsize); 57 strict_strtoul(memsize_str, 0, &memsize);
57 add_memory_region(0, memsize, BOOT_MEM_RAM); 58 add_memory_region(0, memsize, BOOT_MEM_RAM);
58} 59}
60
61void prom_putchar(unsigned char c)
62{
63 alchemy_uart_putchar(UART0_PHYS_ADDR, c);
64}