diff options
author | Manuel Lauss <manuel.lauss@gmail.com> | 2014-02-20 08:59:23 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 18:09:21 -0400 |
commit | 88e9a93c9d53ddcf633aa07f14245da7f30408c2 (patch) | |
tree | 743667e5317873f87f82a430c71de90cd106b34a /arch/mips/alchemy | |
parent | 8005711c8d80e452748e9572bead54493818f042 (diff) |
MIPS: Alchemy: Determine cohereny at runtime based on cpu type
All Alchemy chips have coherent DMA, but for example the USB or AC97
peripherals on the Au1000/1500/1100 are not.
This patch uses DMA_MAYBE_COHERENT on Alchemy and sets coherentio based
on CPU type.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/6576/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r-- | arch/mips/alchemy/Kconfig | 5 | ||||
-rw-r--r-- | arch/mips/alchemy/common/setup.c | 10 |
2 files changed, 10 insertions, 5 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 7032ac7ecd1b..41386723f9fa 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig | |||
@@ -20,7 +20,6 @@ choice | |||
20 | 20 | ||
21 | config MIPS_MTX1 | 21 | config MIPS_MTX1 |
22 | bool "4G Systems MTX-1 board" | 22 | bool "4G Systems MTX-1 board" |
23 | select DMA_NONCOHERENT | ||
24 | select HW_HAS_PCI | 23 | select HW_HAS_PCI |
25 | select ALCHEMY_GPIOINT_AU1000 | 24 | select ALCHEMY_GPIOINT_AU1000 |
26 | select SYS_SUPPORTS_LITTLE_ENDIAN | 25 | select SYS_SUPPORTS_LITTLE_ENDIAN |
@@ -29,7 +28,6 @@ config MIPS_MTX1 | |||
29 | config MIPS_DB1000 | 28 | config MIPS_DB1000 |
30 | bool "Alchemy DB1000/DB1500/DB1100 PB1500/1100 boards" | 29 | bool "Alchemy DB1000/DB1500/DB1100 PB1500/1100 boards" |
31 | select ALCHEMY_GPIOINT_AU1000 | 30 | select ALCHEMY_GPIOINT_AU1000 |
32 | select DMA_NONCOHERENT | ||
33 | select HW_HAS_PCI | 31 | select HW_HAS_PCI |
34 | select SYS_SUPPORTS_BIG_ENDIAN | 32 | select SYS_SUPPORTS_BIG_ENDIAN |
35 | select SYS_SUPPORTS_LITTLE_ENDIAN | 33 | select SYS_SUPPORTS_LITTLE_ENDIAN |
@@ -39,13 +37,11 @@ config MIPS_DB1235 | |||
39 | bool "Alchemy DB1200/PB1200/DB1300/DB1550/PB1550 boards" | 37 | bool "Alchemy DB1200/PB1200/DB1300/DB1550/PB1550 boards" |
40 | select ARCH_REQUIRE_GPIOLIB | 38 | select ARCH_REQUIRE_GPIOLIB |
41 | select HW_HAS_PCI | 39 | select HW_HAS_PCI |
42 | select DMA_COHERENT | ||
43 | select SYS_SUPPORTS_LITTLE_ENDIAN | 40 | select SYS_SUPPORTS_LITTLE_ENDIAN |
44 | select SYS_HAS_EARLY_PRINTK | 41 | select SYS_HAS_EARLY_PRINTK |
45 | 42 | ||
46 | config MIPS_XXS1500 | 43 | config MIPS_XXS1500 |
47 | bool "MyCable XXS1500 board" | 44 | bool "MyCable XXS1500 board" |
48 | select DMA_NONCOHERENT | ||
49 | select ALCHEMY_GPIOINT_AU1000 | 45 | select ALCHEMY_GPIOINT_AU1000 |
50 | select SYS_SUPPORTS_LITTLE_ENDIAN | 46 | select SYS_SUPPORTS_LITTLE_ENDIAN |
51 | select SYS_HAS_EARLY_PRINTK | 47 | select SYS_HAS_EARLY_PRINTK |
@@ -54,7 +50,6 @@ config MIPS_GPR | |||
54 | bool "Trapeze ITS GPR board" | 50 | bool "Trapeze ITS GPR board" |
55 | select ALCHEMY_GPIOINT_AU1000 | 51 | select ALCHEMY_GPIOINT_AU1000 |
56 | select HW_HAS_PCI | 52 | select HW_HAS_PCI |
57 | select DMA_NONCOHERENT | ||
58 | select SYS_SUPPORTS_LITTLE_ENDIAN | 53 | select SYS_SUPPORTS_LITTLE_ENDIAN |
59 | select SYS_HAS_EARLY_PRINTK | 54 | select SYS_HAS_EARLY_PRINTK |
60 | 55 | ||
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c index 62b4e7bbeab9..566a1743f685 100644 --- a/arch/mips/alchemy/common/setup.c +++ b/arch/mips/alchemy/common/setup.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/jiffies.h> | 30 | #include <linux/jiffies.h> |
31 | #include <linux/module.h> | 31 | #include <linux/module.h> |
32 | 32 | ||
33 | #include <asm/dma-coherence.h> | ||
33 | #include <asm/mipsregs.h> | 34 | #include <asm/mipsregs.h> |
34 | #include <asm/time.h> | 35 | #include <asm/time.h> |
35 | 36 | ||
@@ -59,6 +60,15 @@ void __init plat_mem_setup(void) | |||
59 | /* Clear to obtain best system bus performance */ | 60 | /* Clear to obtain best system bus performance */ |
60 | clear_c0_config(1 << 19); /* Clear Config[OD] */ | 61 | clear_c0_config(1 << 19); /* Clear Config[OD] */ |
61 | 62 | ||
63 | hw_coherentio = 0; | ||
64 | coherentio = 1; | ||
65 | switch (alchemy_get_cputype()) { | ||
66 | case ALCHEMY_CPU_AU1000: | ||
67 | case ALCHEMY_CPU_AU1500: | ||
68 | case ALCHEMY_CPU_AU1100: | ||
69 | coherentio = 0; | ||
70 | } | ||
71 | |||
62 | board_setup(); /* board specific setup */ | 72 | board_setup(); /* board specific setup */ |
63 | 73 | ||
64 | /* IO/MEM resources. */ | 74 | /* IO/MEM resources. */ |