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authorManuel Lauss <manuel.lauss@googlemail.com>2009-12-08 13:18:13 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:53:04 -0500
commit32fd6901a6d8d19f94e4de6be4e4b552ab078620 (patch)
treeb0bce261bcdbf6cd4b4026711ee5cbc6e10d9892 /arch/mips/alchemy
parent325f8a0a31df567dbafafc48f8e60f3c1f101a46 (diff)
MIPS: Alchemy: get rid of common/reset.c
Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/783/ Patchwork: http://patchwork.linux-mips.org/patch/882/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/common/Makefile3
-rw-r--r--arch/mips/alchemy/common/reset.c185
-rw-r--r--arch/mips/alchemy/common/setup.c9
-rw-r--r--arch/mips/alchemy/devboards/db1200/setup.c19
-rw-r--r--arch/mips/alchemy/devboards/db1x00/board_setup.c49
-rw-r--r--arch/mips/alchemy/devboards/platform.c29
-rw-r--r--arch/mips/alchemy/mtx-1/board_setup.c15
-rw-r--r--arch/mips/alchemy/xxs1500/board_setup.c15
8 files changed, 99 insertions, 225 deletions
diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile
index f46b351a961d..06c0e65a54b5 100644
--- a/arch/mips/alchemy/common/Makefile
+++ b/arch/mips/alchemy/common/Makefile
@@ -5,8 +5,7 @@
5# Makefile for the Alchemy Au1xx0 CPUs, generic files. 5# Makefile for the Alchemy Au1xx0 CPUs, generic files.
6# 6#
7 7
8obj-y += prom.o time.o reset.o \ 8obj-y += prom.o time.o clocks.o platform.o power.o setup.o \
9 clocks.o platform.o power.o setup.o \
10 sleeper.o dma.o dbdma.o 9 sleeper.o dma.o dbdma.o
11 10
12obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o 11obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o
diff --git a/arch/mips/alchemy/common/reset.c b/arch/mips/alchemy/common/reset.c
deleted file mode 100644
index 266afd48c194..000000000000
--- a/arch/mips/alchemy/common/reset.c
+++ /dev/null
@@ -1,185 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Au1xx0 reset routines.
5 *
6 * Copyright 2001, 2006, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/gpio.h>
31
32#include <asm/cacheflush.h>
33#include <asm/mach-au1x00/au1000.h>
34
35void au1000_restart(char *command)
36{
37 /* Set all integrated peripherals to disabled states */
38 extern void board_reset(void);
39 u32 prid = read_c0_prid();
40
41 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
42
43 switch (prid & 0xFF000000) {
44 case 0x00000000: /* Au1000 */
45 au_writel(0x02, 0xb0000010); /* ac97_enable */
46 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
47 asm("sync");
48 au_writel(0x00, 0xb017fffc); /* usbh_enable */
49 au_writel(0x00, 0xb0200058); /* usbd_enable */
50 au_writel(0x00, 0xb0300040); /* ir_enable */
51 au_writel(0x00, 0xb4004104); /* mac dma */
52 au_writel(0x00, 0xb4004114); /* mac dma */
53 au_writel(0x00, 0xb4004124); /* mac dma */
54 au_writel(0x00, 0xb4004134); /* mac dma */
55 au_writel(0x00, 0xb0520000); /* macen0 */
56 au_writel(0x00, 0xb0520004); /* macen1 */
57 au_writel(0x00, 0xb1000008); /* i2s_enable */
58 au_writel(0x00, 0xb1100100); /* uart0_enable */
59 au_writel(0x00, 0xb1200100); /* uart1_enable */
60 au_writel(0x00, 0xb1300100); /* uart2_enable */
61 au_writel(0x00, 0xb1400100); /* uart3_enable */
62 au_writel(0x02, 0xb1600100); /* ssi0_enable */
63 au_writel(0x02, 0xb1680100); /* ssi1_enable */
64 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
65 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
66 au_writel(0x00, 0xb1900028); /* sys_clksrc */
67 au_writel(0x10, 0xb1900060); /* sys_cpupll */
68 au_writel(0x00, 0xb1900064); /* sys_auxpll */
69 au_writel(0x00, 0xb1900100); /* sys_pininputen */
70 break;
71 case 0x01000000: /* Au1500 */
72 au_writel(0x02, 0xb0000010); /* ac97_enable */
73 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
74 asm("sync");
75 au_writel(0x00, 0xb017fffc); /* usbh_enable */
76 au_writel(0x00, 0xb0200058); /* usbd_enable */
77 au_writel(0x00, 0xb4004104); /* mac dma */
78 au_writel(0x00, 0xb4004114); /* mac dma */
79 au_writel(0x00, 0xb4004124); /* mac dma */
80 au_writel(0x00, 0xb4004134); /* mac dma */
81 au_writel(0x00, 0xb1520000); /* macen0 */
82 au_writel(0x00, 0xb1520004); /* macen1 */
83 au_writel(0x00, 0xb1100100); /* uart0_enable */
84 au_writel(0x00, 0xb1400100); /* uart3_enable */
85 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
86 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
87 au_writel(0x00, 0xb1900028); /* sys_clksrc */
88 au_writel(0x10, 0xb1900060); /* sys_cpupll */
89 au_writel(0x00, 0xb1900064); /* sys_auxpll */
90 au_writel(0x00, 0xb1900100); /* sys_pininputen */
91 break;
92 case 0x02000000: /* Au1100 */
93 au_writel(0x02, 0xb0000010); /* ac97_enable */
94 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
95 asm("sync");
96 au_writel(0x00, 0xb017fffc); /* usbh_enable */
97 au_writel(0x00, 0xb0200058); /* usbd_enable */
98 au_writel(0x00, 0xb0300040); /* ir_enable */
99 au_writel(0x00, 0xb4004104); /* mac dma */
100 au_writel(0x00, 0xb4004114); /* mac dma */
101 au_writel(0x00, 0xb4004124); /* mac dma */
102 au_writel(0x00, 0xb4004134); /* mac dma */
103 au_writel(0x00, 0xb0520000); /* macen0 */
104 au_writel(0x00, 0xb1000008); /* i2s_enable */
105 au_writel(0x00, 0xb1100100); /* uart0_enable */
106 au_writel(0x00, 0xb1200100); /* uart1_enable */
107 au_writel(0x00, 0xb1400100); /* uart3_enable */
108 au_writel(0x02, 0xb1600100); /* ssi0_enable */
109 au_writel(0x02, 0xb1680100); /* ssi1_enable */
110 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
111 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
112 au_writel(0x00, 0xb1900028); /* sys_clksrc */
113 au_writel(0x10, 0xb1900060); /* sys_cpupll */
114 au_writel(0x00, 0xb1900064); /* sys_auxpll */
115 au_writel(0x00, 0xb1900100); /* sys_pininputen */
116 break;
117 case 0x03000000: /* Au1550 */
118 au_writel(0x00, 0xb1a00004); /* psc 0 */
119 au_writel(0x00, 0xb1b00004); /* psc 1 */
120 au_writel(0x00, 0xb0a00004); /* psc 2 */
121 au_writel(0x00, 0xb0b00004); /* psc 3 */
122 au_writel(0x00, 0xb017fffc); /* usbh_enable */
123 au_writel(0x00, 0xb0200058); /* usbd_enable */
124 au_writel(0x00, 0xb4004104); /* mac dma */
125 au_writel(0x00, 0xb4004114); /* mac dma */
126 au_writel(0x00, 0xb4004124); /* mac dma */
127 au_writel(0x00, 0xb4004134); /* mac dma */
128 au_writel(0x00, 0xb1520000); /* macen0 */
129 au_writel(0x00, 0xb1520004); /* macen1 */
130 au_writel(0x00, 0xb1100100); /* uart0_enable */
131 au_writel(0x00, 0xb1200100); /* uart1_enable */
132 au_writel(0x00, 0xb1400100); /* uart3_enable */
133 au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
134 au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
135 au_writel(0x00, 0xb1900028); /* sys_clksrc */
136 au_writel(0x10, 0xb1900060); /* sys_cpupll */
137 au_writel(0x00, 0xb1900064); /* sys_auxpll */
138 au_writel(0x00, 0xb1900100); /* sys_pininputen */
139 break;
140 }
141
142 set_c0_status(ST0_BEV | ST0_ERL);
143 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
144 flush_cache_all();
145 write_c0_wired(0);
146
147 /* Give board a chance to do a hardware reset */
148 board_reset();
149
150 /* Jump to the beggining in case board_reset() is empty */
151 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
152}
153
154void au1000_halt(void)
155{
156#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
157 /* Power off system */
158 printk(KERN_NOTICE "\n** Powering off...\n");
159 au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);
160 au_sync();
161 while (1); /* should not get here */
162#else
163 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
164#ifdef CONFIG_MIPS_MIRAGE
165 gpio_direction_output(210, 1);
166#endif
167#ifdef CONFIG_PM
168 au_sleep();
169
170 /* Should not get here */
171 printk(KERN_ERR "Unable to put CPU in sleep mode\n");
172 while (1);
173#else
174 while (1)
175 __asm__(".set\tmips3\n\t"
176 "wait\n\t"
177 ".set\tmips0");
178#endif
179#endif /* defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) */
180}
181
182void au1000_power_off(void)
183{
184 au1000_halt();
185}
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 375984e5c2e6..193ba166affd 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -29,18 +29,13 @@
29#include <linux/ioport.h> 29#include <linux/ioport.h>
30#include <linux/jiffies.h> 30#include <linux/jiffies.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/pm.h>
33 32
34#include <asm/mipsregs.h> 33#include <asm/mipsregs.h>
35#include <asm/reboot.h>
36#include <asm/time.h> 34#include <asm/time.h>
37 35
38#include <au1000.h> 36#include <au1000.h>
39 37
40extern void __init board_setup(void); 38extern void __init board_setup(void);
41extern void au1000_restart(char *);
42extern void au1000_halt(void);
43extern void au1000_power_off(void);
44extern void set_cpuspec(void); 39extern void set_cpuspec(void);
45 40
46void __init plat_mem_setup(void) 41void __init plat_mem_setup(void)
@@ -57,10 +52,6 @@ void __init plat_mem_setup(void)
57 /* this is faster than wasting cycles trying to approximate it */ 52 /* this is faster than wasting cycles trying to approximate it */
58 preset_lpj = (est_freq >> 1) / HZ; 53 preset_lpj = (est_freq >> 1) / HZ;
59 54
60 _machine_restart = au1000_restart;
61 _machine_halt = au1000_halt;
62 pm_power_off = au1000_power_off;
63
64 board_setup(); /* board specific setup */ 55 board_setup(); /* board specific setup */
65 56
66 if (au1xxx_cpu_needs_config_od()) 57 if (au1xxx_cpu_needs_config_od())
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index a3458c0e4051..379536e3abd1 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -9,30 +9,15 @@
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/pm.h>
13#include <asm/mach-au1x00/au1000.h> 12#include <asm/mach-au1x00/au1000.h>
14#include <asm/mach-db1x00/bcsr.h> 13#include <asm/mach-db1x00/bcsr.h>
15#include <asm/mach-db1x00/db1200.h> 14#include <asm/mach-db1x00/db1200.h>
16#include <asm/processor.h>
17#include <asm/reboot.h>
18 15
19const char *get_system_type(void) 16const char *get_system_type(void)
20{ 17{
21 return "Alchemy Db1200"; 18 return "Alchemy Db1200";
22} 19}
23 20
24static void board_power_off(void)
25{
26 bcsr_write(BCSR_RESETS, 0);
27 bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);
28}
29
30void board_reset(void)
31{
32 bcsr_write(BCSR_RESETS, 0);
33 bcsr_write(BCSR_SYSTEM, 0);
34}
35
36void __init board_setup(void) 21void __init board_setup(void)
37{ 22{
38 unsigned long freq0, clksrc, div, pfc; 23 unsigned long freq0, clksrc, div, pfc;
@@ -73,10 +58,6 @@ void __init board_setup(void)
73 clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT; 58 clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
74 __raw_writel(clksrc, (void __iomem *)SYS_CLKSRC); 59 __raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
75 wmb(); 60 wmb();
76
77 pm_power_off = board_power_off;
78 _machine_halt = board_power_off;
79 _machine_restart = (void(*)(char *))board_reset;
80} 61}
81 62
82/* use the hexleds to count the number of times the cpu has entered 63/* use the hexleds to count the number of times the cpu has entered
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
index b490efff4dca..56c541d0c55a 100644
--- a/arch/mips/alchemy/devboards/db1x00/board_setup.c
+++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c
@@ -30,11 +30,13 @@
30#include <linux/gpio.h> 30#include <linux/gpio.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/interrupt.h> 32#include <linux/interrupt.h>
33#include <linux/pm.h>
33 34
34#include <asm/mach-au1x00/au1000.h> 35#include <asm/mach-au1x00/au1000.h>
35#include <asm/mach-au1x00/au1xxx_eth.h> 36#include <asm/mach-au1x00/au1xxx_eth.h>
36#include <asm/mach-db1x00/db1x00.h> 37#include <asm/mach-db1x00/db1x00.h>
37#include <asm/mach-db1x00/bcsr.h> 38#include <asm/mach-db1x00/bcsr.h>
39#include <asm/reboot.h>
38 40
39#include <prom.h> 41#include <prom.h>
40 42
@@ -43,6 +45,18 @@ char irq_tab_alchemy[][5] __initdata = {
43 [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */ 45 [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */
44 [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ 46 [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */
45}; 47};
48
49static void bosporus_power_off(void)
50{
51 printk(KERN_INFO "It's now safe to turn off power\n");
52 while (1)
53 asm volatile (".set mips3 ; wait ; .set mips0");
54}
55
56const char *get_system_type(void)
57{
58 return "Alchemy Bosporus Gateway Reference";
59}
46#endif 60#endif
47 61
48/* 62/*
@@ -73,6 +87,16 @@ char irq_tab_alchemy[][5] __initdata = {
73 [12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */ 87 [12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */
74 [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */ 88 [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */
75}; 89};
90
91static void mirage_power_off(void)
92{
93 alchemy_gpio_direction_output(210, 1);
94}
95
96const char *get_system_type(void)
97{
98 return "Alchemy Mirage";
99}
76#endif 100#endif
77 101
78#ifdef CONFIG_MIPS_DB1550 102#ifdef CONFIG_MIPS_DB1550
@@ -83,19 +107,19 @@ char irq_tab_alchemy[][5] __initdata = {
83}; 107};
84#endif 108#endif
85 109
86const char *get_system_type(void) 110#if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
111static void mips_softreset(void)
87{ 112{
88#ifdef CONFIG_MIPS_BOSPORUS 113 asm volatile ("jr\t%0" : : "r"(0xbfc00000));
89 return "Alchemy Bosporus Gateway Reference";
90#else
91 return "Alchemy Db1x00";
92#endif
93} 114}
94 115
95void board_reset(void) 116#else
117
118const char *get_system_type(void)
96{ 119{
97 bcsr_write(BCSR_SYSTEM, 0); 120 return "Alchemy Db1x00";
98} 121}
122#endif
99 123
100void __init board_setup(void) 124void __init board_setup(void)
101{ 125{
@@ -196,8 +220,17 @@ void __init board_setup(void)
196 * be part of the audio driver. 220 * be part of the audio driver.
197 */ 221 */
198 alchemy_gpio_direction_output(209, 1); 222 alchemy_gpio_direction_output(209, 1);
223
224 pm_power_off = mirage_power_off;
225 _machine_halt = mirage_power_off;
226 _machine_restart = (void(*)(char *))mips_softreset;
199#endif 227#endif
200 228
229#ifdef CONFIG_MIPS_BOSPORUS
230 pm_power_off = bosporus_power_off;
231 _machine_halt = bosporus_power_off;
232 _machine_restart = (void(*)(char *))mips_softreset;
233#endif
201 au_sync(); 234 au_sync();
202} 235}
203 236
diff --git a/arch/mips/alchemy/devboards/platform.c b/arch/mips/alchemy/devboards/platform.c
index 7f2bcee7ac34..febf4e042343 100644
--- a/arch/mips/alchemy/devboards/platform.c
+++ b/arch/mips/alchemy/devboards/platform.c
@@ -8,6 +8,35 @@
8#include <linux/mtd/physmap.h> 8#include <linux/mtd/physmap.h>
9#include <linux/slab.h> 9#include <linux/slab.h>
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/pm.h>
12
13#include <asm/reboot.h>
14#include <asm/mach-db1x00/bcsr.h>
15
16static void db1x_power_off(void)
17{
18 bcsr_write(BCSR_RESETS, 0);
19 bcsr_write(BCSR_SYSTEM, BCSR_SYSTEM_PWROFF | BCSR_SYSTEM_RESET);
20}
21
22static void db1x_reset(char *c)
23{
24 bcsr_write(BCSR_RESETS, 0);
25 bcsr_write(BCSR_SYSTEM, 0);
26}
27
28static int __init db1x_poweroff_setup(void)
29{
30 if (!pm_power_off)
31 pm_power_off = db1x_power_off;
32 if (!_machine_halt)
33 _machine_halt = db1x_power_off;
34 if (!_machine_restart)
35 _machine_restart = db1x_reset;
36
37 return 0;
38}
39late_initcall(db1x_poweroff_setup);
11 40
12/* register a pcmcia socket */ 41/* register a pcmcia socket */
13int __init db1x_register_pcmcia_socket(unsigned long pseudo_attr_start, 42int __init db1x_register_pcmcia_socket(unsigned long pseudo_attr_start,
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index 13577eec8b44..e2838c6185d3 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -31,7 +31,9 @@
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/interrupt.h> 33#include <linux/interrupt.h>
34#include <linux/pm.h>
34 35
36#include <asm/reboot.h>
35#include <asm/mach-au1x00/au1000.h> 37#include <asm/mach-au1x00/au1000.h>
36 38
37#include <prom.h> 39#include <prom.h>
@@ -50,12 +52,19 @@ char irq_tab_alchemy[][5] __initdata = {
50extern int (*board_pci_idsel)(unsigned int devsel, int assert); 52extern int (*board_pci_idsel)(unsigned int devsel, int assert);
51int mtx1_pci_idsel(unsigned int devsel, int assert); 53int mtx1_pci_idsel(unsigned int devsel, int assert);
52 54
53void board_reset(void) 55static void mtx1_reset(char *c)
54{ 56{
55 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 57 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
56 au_writel(0x00000000, 0xAE00001C); 58 au_writel(0x00000000, 0xAE00001C);
57} 59}
58 60
61static void mtx1_power_off(void)
62{
63 printk(KERN_ALERT "It's now safe to remove power\n");
64 while (1)
65 asm volatile (".set mips3 ; wait ; .set mips1");
66}
67
59void __init board_setup(void) 68void __init board_setup(void)
60{ 69{
61#ifdef CONFIG_SERIAL_8250_CONSOLE 70#ifdef CONFIG_SERIAL_8250_CONSOLE
@@ -98,6 +107,10 @@ void __init board_setup(void)
98 alchemy_gpio_direction_output(211, 1); /* green on */ 107 alchemy_gpio_direction_output(211, 1); /* green on */
99 alchemy_gpio_direction_output(212, 0); /* red off */ 108 alchemy_gpio_direction_output(212, 0); /* red off */
100 109
110 pm_power_off = mtx1_power_off;
111 _machine_halt = mtx1_power_off;
112 _machine_restart = mtx1_reset;
113
101 printk(KERN_INFO "4G Systems MTX-1 Board\n"); 114 printk(KERN_INFO "4G Systems MTX-1 Board\n");
102} 115}
103 116
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
index 21bef8dc0883..7956afa78c4b 100644
--- a/arch/mips/alchemy/xxs1500/board_setup.c
+++ b/arch/mips/alchemy/xxs1500/board_setup.c
@@ -27,17 +27,26 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/pm.h>
30 31
32#include <asm/reboot.h>
31#include <asm/mach-au1x00/au1000.h> 33#include <asm/mach-au1x00/au1000.h>
32 34
33#include <prom.h> 35#include <prom.h>
34 36
35void board_reset(void) 37static void xxs1500_reset(char *c)
36{ 38{
37 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 39 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
38 au_writel(0x00000000, 0xAE00001C); 40 au_writel(0x00000000, 0xAE00001C);
39} 41}
40 42
43static void xxs1500_power_off(void)
44{
45 printk(KERN_ALERT "It's now safe to remove power\n");
46 while (1)
47 asm volatile (".set mips3 ; wait ; .set mips1");
48}
49
41void __init board_setup(void) 50void __init board_setup(void)
42{ 51{
43 u32 pin_func; 52 u32 pin_func;
@@ -52,6 +61,10 @@ void __init board_setup(void)
52 } 61 }
53#endif 62#endif
54 63
64 pm_power_off = xxs1500_power_off;
65 _machine_halt = xxs1500_power_off;
66 _machine_restart = xxs1500_reset;
67
55 alchemy_gpio1_input_enable(); 68 alchemy_gpio1_input_enable();
56 alchemy_gpio2_enable(); 69 alchemy_gpio2_enable();
57 70
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 09:47:45 -0500