diff options
author | Manuel Lauss <manuel.lauss@gmail.com> | 2014-07-23 10:36:49 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 08:09:02 -0400 |
commit | 5a2fb71e7329dbcefbd08db8e44055c72ed52e90 (patch) | |
tree | a589bacbe525cd520104bda0da11ea302d268686 /arch/mips/alchemy | |
parent | 474402291a0ad4778a4e5fdff6ae507b2a26d809 (diff) |
MIPS: Alchemy: platform: use clk framework for uarts
Use the clock framework to get the rate of the peripheral clock.
Remove the now obsolete get_uart_baud_base function.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7468/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r-- | arch/mips/alchemy/common/clocks.c | 19 | ||||
-rw-r--r-- | arch/mips/alchemy/common/platform.c | 13 |
2 files changed, 12 insertions, 20 deletions
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c index 0e41416fa682..a4c7cd74cfe4 100644 --- a/arch/mips/alchemy/common/clocks.c +++ b/arch/mips/alchemy/common/clocks.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #define AU1000_SRC_CLK 12000000 | 38 | #define AU1000_SRC_CLK 12000000 |
39 | 39 | ||
40 | static unsigned int au1x00_clock; /* Hz */ | 40 | static unsigned int au1x00_clock; /* Hz */ |
41 | static unsigned long uart_baud_base; | ||
42 | 41 | ||
43 | /* | 42 | /* |
44 | * Set the au1000_clock | 43 | * Set the au1000_clock |
@@ -55,21 +54,6 @@ unsigned int get_au1x00_speed(void) | |||
55 | EXPORT_SYMBOL(get_au1x00_speed); | 54 | EXPORT_SYMBOL(get_au1x00_speed); |
56 | 55 | ||
57 | /* | 56 | /* |
58 | * The UART baud base is not known at compile time ... if | ||
59 | * we want to be able to use the same code on different | ||
60 | * speed CPUs. | ||
61 | */ | ||
62 | unsigned long get_au1x00_uart_baud_base(void) | ||
63 | { | ||
64 | return uart_baud_base; | ||
65 | } | ||
66 | |||
67 | void set_au1x00_uart_baud_base(unsigned long new_baud_base) | ||
68 | { | ||
69 | uart_baud_base = new_baud_base; | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * We read the real processor speed from the PLL. This is important | 57 | * We read the real processor speed from the PLL. This is important |
74 | * because it is more accurate than computing it from the 32 KHz | 58 | * because it is more accurate than computing it from the 32 KHz |
75 | * counter, if it exists. If we don't have an accurate processor | 59 | * counter, if it exists. If we don't have an accurate processor |
@@ -95,9 +79,6 @@ unsigned long au1xxx_calc_clock(void) | |||
95 | 79 | ||
96 | /* On Alchemy CPU:counter ratio is 1:1 */ | 80 | /* On Alchemy CPU:counter ratio is 1:1 */ |
97 | mips_hpt_frequency = cpu_speed; | 81 | mips_hpt_frequency = cpu_speed; |
98 | /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */ | ||
99 | set_au1x00_uart_baud_base(cpu_speed / (2 * | ||
100 | ((alchemy_rdsys(AU1000_SYS_POWERCTRL) & 0x03) + 2) * 16)); | ||
101 | 82 | ||
102 | set_au1x00_speed(cpu_speed); | 83 | set_au1x00_speed(cpu_speed); |
103 | 84 | ||
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index fb89d213523b..d77a64f4c78b 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c | |||
@@ -11,6 +11,7 @@ | |||
11 | * warranty of any kind, whether express or implied. | 11 | * warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/clk.h> | ||
14 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
15 | #include <linux/etherdevice.h> | 16 | #include <linux/etherdevice.h> |
16 | #include <linux/init.h> | 17 | #include <linux/init.h> |
@@ -99,10 +100,20 @@ static struct platform_device au1xx0_uart_device = { | |||
99 | 100 | ||
100 | static void __init alchemy_setup_uarts(int ctype) | 101 | static void __init alchemy_setup_uarts(int ctype) |
101 | { | 102 | { |
102 | unsigned int uartclk = get_au1x00_uart_baud_base() * 16; | 103 | long uartclk; |
103 | int s = sizeof(struct plat_serial8250_port); | 104 | int s = sizeof(struct plat_serial8250_port); |
104 | int c = alchemy_get_uarts(ctype); | 105 | int c = alchemy_get_uarts(ctype); |
105 | struct plat_serial8250_port *ports; | 106 | struct plat_serial8250_port *ports; |
107 | struct clk *clk = clk_get(NULL, ALCHEMY_PERIPH_CLK); | ||
108 | |||
109 | if (IS_ERR(clk)) | ||
110 | return; | ||
111 | if (clk_prepare_enable(clk)) { | ||
112 | clk_put(clk); | ||
113 | return; | ||
114 | } | ||
115 | uartclk = clk_get_rate(clk); | ||
116 | clk_put(clk); | ||
106 | 117 | ||
107 | ports = kzalloc(s * (c + 1), GFP_KERNEL); | 118 | ports = kzalloc(s * (c + 1), GFP_KERNEL); |
108 | if (!ports) { | 119 | if (!ports) { |