MIPS: MTX-1: Add udelay to mtx1_pci_idsel

Without this udelay(1) PCI idsel does not work correctly on the
"singleboard" (T-Mobile Surfbox) for the MiniPCI device. The result is
that PCI configuration fails and the MiniPCI card is not detected
correctly. Instead of

PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
pci_bus 0000:00: root bus resource [io  0x1000-0xffff]
pci 0000:00:03.0: BAR 0: assigned [mem 0x40000000-0x4000ffff]
pci 0000:00:00.0: BAR 0: assigned [mem 0x40010000-0x40010fff]
pci 0000:00:00.1: BAR 0: assigned [mem 0x40011000-0x40011fff]

We see only the CardBus device:

PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
pci_bus 0000:00: root bus resource [io  0x1000-0xffff]
pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x40000fff]
pci 0000:00:00.1: BAR 0: assigned [mem 0x40001000-0x40001fff]

Later the device driver shows this error:

ath5k 0000:00:03.0: cannot remap PCI memory region
ath5k: probe of 0000:00:03.0 failed with error -5

I assume that the logic chip which usually supresses the signal to the CardBus
card has some settling time and without the delay it would still let the
Cardbus interfere with the response from the MiniPCI card.

What I cannot explain is why this behaviour shows up now and not in earlier
kernel versions before. Maybe older PCI code was slower?

Signed-off-by: Bruno Randolf <br1@einfach.org>
Cc: linux-mips@linux-mips.org
Cc: manuel.lauss@googlemail.com
Cc: florian@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/4087/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 2 insertions, 0 deletions

diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c
index 99969484c475..a124c251c0c9 100644
--- a/arch/mips/alchemy/board-mtx1.c
+++ b/arch/mips/alchemy/board-mtx1.c
@@ -228,6 +228,8 @@ static int mtx1_pci_idsel(unsigned int devsel, int assert)
          * adapter on the mtx-1 "singleboard" variant. It triggers a custom
          * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
          */
+        udelay(1);
+
         if (assert && devsel != 0)
                 /* Suppress signal to Cardbus */
                 alchemy_gpio_set_value(1, 0);   /* set EXT_IO3 OFF */