aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/alchemy/xxs1500
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2008-09-16 13:12:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 11:18:50 -0400
commite8c7c482347574ecdd45c43e32c332d5fc2ece61 (patch)
treec741aa6cdb4e897df9f9476d83a816a7a2b058dd /arch/mips/alchemy/xxs1500
parent8d2d91e86b4153cc2305ec86fe908048f459ff7f (diff)
MIPS: Alchemy: rename directory
It's more than the au1000 these days. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/xxs1500')
-rw-r--r--arch/mips/alchemy/xxs1500/Makefile8
-rw-r--r--arch/mips/alchemy/xxs1500/board_setup.c79
-rw-r--r--arch/mips/alchemy/xxs1500/init.c58
-rw-r--r--arch/mips/alchemy/xxs1500/irqmap.c49
4 files changed, 194 insertions, 0 deletions
diff --git a/arch/mips/alchemy/xxs1500/Makefile b/arch/mips/alchemy/xxs1500/Makefile
new file mode 100644
index 000000000000..db3c526f64d8
--- /dev/null
+++ b/arch/mips/alchemy/xxs1500/Makefile
@@ -0,0 +1,8 @@
1#
2# Copyright 2003 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. <source@mvista.com>
4#
5# Makefile for MyCable XXS1500 board.
6#
7
8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
new file mode 100644
index 000000000000..4c587acac5c3
--- /dev/null
+++ b/arch/mips/alchemy/xxs1500/board_setup.c
@@ -0,0 +1,79 @@
1/*
2 * Copyright 2000-2003, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/init.h>
27#include <linux/delay.h>
28
29#include <asm/mach-au1x00/au1000.h>
30
31void board_reset(void)
32{
33 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
34 au_writel(0x00000000, 0xAE00001C);
35}
36
37void __init board_setup(void)
38{
39 u32 pin_func;
40
41 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
42 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
43 pin_func |= SYS_PF_UR3;
44 au_writel(pin_func, SYS_PINFUNC);
45
46 /* Enable UART */
47 au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
48 mdelay(10);
49 au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
50 mdelay(10);
51
52 /* Enable DTR = USB power up */
53 au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
54
55#ifdef CONFIG_PCMCIA_XXS1500
56 /* Setup PCMCIA signals */
57 au_writel(0, SYS_PININPUTEN);
58
59 /* GPIO 0, 1, and 4 are inputs */
60 au_writel(1 | (1 << 1) | (1 << 4), SYS_TRIOUTCLR);
61
62 /* Enable GPIO2 if not already enabled */
63 au_writel(1, GPIO2_ENABLE);
64 /* GPIO2 208/9/10/11 are inputs */
65 au_writel((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11), GPIO2_DIR);
66
67 /* Turn off power */
68 au_writel((au_readl(GPIO2_PINSTATE) & ~(1 << 14)) | (1 << 30),
69 GPIO2_OUTPUT);
70#endif
71
72#ifdef CONFIG_PCI
73#if defined(__MIPSEB__)
74 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
75#else
76 au_writel(0xf, Au1500_PCI_CFG);
77#endif
78#endif
79}
diff --git a/arch/mips/alchemy/xxs1500/init.c b/arch/mips/alchemy/xxs1500/init.c
new file mode 100644
index 000000000000..7516434760a1
--- /dev/null
+++ b/arch/mips/alchemy/xxs1500/init.c
@@ -0,0 +1,58 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * XXS1500 board setup
4 *
5 * Copyright 2003, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/kernel.h>
31
32#include <asm/bootinfo.h>
33
34#include <prom.h>
35
36const char *get_system_type(void)
37{
38 return "XXS1500";
39}
40
41void __init prom_init(void)
42{
43 unsigned char *memsize_str;
44 unsigned long memsize;
45
46 prom_argc = fw_arg0;
47 prom_argv = (char **)fw_arg1;
48 prom_envp = (char **)fw_arg2;
49
50 prom_init_cmdline();
51
52 memsize_str = prom_getenv("memsize");
53 if (!memsize_str)
54 memsize = 0x04000000;
55 else
56 strict_strtol(memsize_str, 0, &memsize);
57 add_memory_region(0, memsize, BOOT_MEM_RAM);
58}
diff --git a/arch/mips/alchemy/xxs1500/irqmap.c b/arch/mips/alchemy/xxs1500/irqmap.c
new file mode 100644
index 000000000000..edf06ed11870
--- /dev/null
+++ b/arch/mips/alchemy/xxs1500/irqmap.c
@@ -0,0 +1,49 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * Copyright 2003 Embedded Edge, LLC
6 * dan@embeddededge.com
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/init.h>
30
31#include <asm/mach-au1x00/au1000.h>
32
33struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
34 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
35 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
36 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
37 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
38 { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
39 { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
40
41 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
42 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
43 { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 },
44 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
45 { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */
46 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 },
47};
48
49int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);