MIPS: Alchemy: update core interrupt code.

This patch attempts to modernize core Alchemy interrupt handling code.

- add irq_chips for irq controllers instead of irq type,
- add a set_type() hook to change irq trigger type during runtime,
- add a set_wake() hook to control GPIO0..7 based wakeup,
- use linux' IRQF_TRIGGER_ constants instead of homebrew ones,
- enable GENERIC_HARDIRQS_NO__DO_IRQ.
- simplify plat_irq_dispatch
- merge au1xxx_irqmap into irq.c file, the only place where its
  contents are referenced.
- board_init_irq() is now mandatory for every board; use it to register
  the remaining (gpio-based) interrupt sources; update all boards
  accordingly.

Run-tested on Db1200 and other Au1200 based platforms.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c

1 files changed, 17 insertions, 14 deletions

diff --git a/arch/mips/alchemy/xxs1500/irqmap.c b/arch/mips/alchemy/xxs1500/irqmap.c
index edf06ed11870..0f0f3012e5fd 100644
--- a/arch/mips/alchemy/xxs1500/irqmap.c
+++ b/arch/mips/alchemy/xxs1500/irqmap.c
@@ -27,23 +27,26 @@
  */
 
 #include <linux/init.h>
-
+#include <linux/interrupt.h>
 #include <asm/mach-au1x00/au1000.h>
 
 struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
-        { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
-        { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
-        { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
-        { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
-        { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
-        { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+        { AU1500_GPIO_204, IRQF_TRIGGER_HIGH, 0 },
+        { AU1500_GPIO_201, IRQF_TRIGGER_LOW, 0 },
+        { AU1500_GPIO_202, IRQF_TRIGGER_LOW, 0 },
+        { AU1500_GPIO_203, IRQF_TRIGGER_LOW, 0 },
+        { AU1500_GPIO_205, IRQF_TRIGGER_LOW, 0 },
+        { AU1500_GPIO_207, IRQF_TRIGGER_LOW, 0 },
 
-        { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
-        { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
-        { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 },
-        { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
-        { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */
-        { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 },
+        { AU1000_GPIO_0, IRQF_TRIGGER_LOW, 0 },
+        { AU1000_GPIO_1, IRQF_TRIGGER_LOW, 0 },
+        { AU1000_GPIO_2, IRQF_TRIGGER_LOW, 0 },
+        { AU1000_GPIO_3, IRQF_TRIGGER_LOW, 0 },
+        { AU1000_GPIO_4, IRQF_TRIGGER_LOW, 0 }, /* CF interrupt */
+        { AU1000_GPIO_5, IRQF_TRIGGER_LOW, 0 },
 };
 
-int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
+void __init board_init_irq(void)
+{
+        au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
+}