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authorManuel Lauss <mano@roarinelk.homelinux.net>2008-12-21 03:26:17 -0500
committerRalf Baechle <ralf@linux-mips.org>2009-01-11 04:57:26 -0500
commit785e3268e2951d4c0c21417c8e5d8004b2ab2480 (patch)
tree3e7e98dbaf2592f22f65090325a823d36caa13f7 /arch/mips/alchemy/mtx-1/irqmap.c
parent7179380ee9bdeb5fa2ff07581f512fe0f5382e5b (diff)
MIPS: Alchemy: update core interrupt code.
This patch attempts to modernize core Alchemy interrupt handling code. - add irq_chips for irq controllers instead of irq type, - add a set_type() hook to change irq trigger type during runtime, - add a set_wake() hook to control GPIO0..7 based wakeup, - use linux' IRQF_TRIGGER_ constants instead of homebrew ones, - enable GENERIC_HARDIRQS_NO__DO_IRQ. - simplify plat_irq_dispatch - merge au1xxx_irqmap into irq.c file, the only place where its contents are referenced. - board_init_irq() is now mandatory for every board; use it to register the remaining (gpio-based) interrupt sources; update all boards accordingly. Run-tested on Db1200 and other Au1200 based platforms. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
Diffstat (limited to 'arch/mips/alchemy/mtx-1/irqmap.c')
-rw-r--r--arch/mips/alchemy/mtx-1/irqmap.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/arch/mips/alchemy/mtx-1/irqmap.c b/arch/mips/alchemy/mtx-1/irqmap.c
index f2bf02951e9c..f1ab12ab3433 100644
--- a/arch/mips/alchemy/mtx-1/irqmap.c
+++ b/arch/mips/alchemy/mtx-1/irqmap.c
@@ -27,7 +27,7 @@
27 */ 27 */
28 28
29#include <linux/init.h> 29#include <linux/init.h>
30 30#include <linux/interrupt.h>
31#include <asm/mach-au1x00/au1000.h> 31#include <asm/mach-au1x00/au1000.h>
32 32
33char irq_tab_alchemy[][5] __initdata = { 33char irq_tab_alchemy[][5] __initdata = {
@@ -42,11 +42,15 @@ char irq_tab_alchemy[][5] __initdata = {
42}; 42};
43 43
44struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 44struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
45 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 }, 45 { AU1500_GPIO_204, IRQF_TRIGGER_HIGH, 0 },
46 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, 46 { AU1500_GPIO_201, IRQF_TRIGGER_LOW, 0 },
47 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, 47 { AU1500_GPIO_202, IRQF_TRIGGER_LOW, 0 },
48 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, 48 { AU1500_GPIO_203, IRQF_TRIGGER_LOW, 0 },
49 { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, 49 { AU1500_GPIO_205, IRQF_TRIGGER_LOW, 0 },
50}; 50};
51 51
52int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); 52
53void __init board_init_irq(void)
54{
55 au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
56}