diff options
author | Manuel Lauss <manuel.lauss@googlemail.com> | 2009-10-07 14:15:13 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 06:52:52 -0500 |
commit | 0a0b1295ef26a5f8387771c148fb63dccf897869 (patch) | |
tree | 383ae3ba093d80a02c74d53bf824331d0decc8de /arch/mips/alchemy/common | |
parent | 5047201b56ce8671cc19f426e2951de9f29b3485 (diff) |
MIPS: Alchemy: higher priority for system timer.
Raise RTCMATCH2 interrupt priority in case it is used as the system
timer tick.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common')
-rw-r--r-- | arch/mips/alchemy/common/irq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index ceb98b2f96c3..8b5f00b3ad4e 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c | |||
@@ -74,7 +74,7 @@ struct au1xxx_irqmap { | |||
74 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 74 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
75 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 75 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
76 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 76 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
77 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 77 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 1 }, |
78 | { AU1000_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, | 78 | { AU1000_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, |
79 | { AU1000_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, | 79 | { AU1000_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, |
80 | { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, | 80 | { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, |
@@ -108,7 +108,7 @@ struct au1xxx_irqmap { | |||
108 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 108 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
109 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 109 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
110 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 110 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
111 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 111 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 1 }, |
112 | { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, | 112 | { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, |
113 | { AU1000_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 113 | { AU1000_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
114 | { AU1000_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 0 }, | 114 | { AU1000_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 0 }, |
@@ -140,7 +140,7 @@ struct au1xxx_irqmap { | |||
140 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 140 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
141 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 141 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
142 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 142 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
143 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 143 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 1 }, |
144 | { AU1000_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, | 144 | { AU1000_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, |
145 | { AU1000_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, | 145 | { AU1000_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, |
146 | { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, | 146 | { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, |
@@ -174,7 +174,7 @@ struct au1xxx_irqmap { | |||
174 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 174 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
175 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 175 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
176 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 176 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
177 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 177 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 1 }, |
178 | { AU1550_NAND_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 178 | { AU1550_NAND_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
179 | { AU1550_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, | 179 | { AU1550_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 1 }, |
180 | { AU1550_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 180 | { AU1550_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
@@ -202,7 +202,7 @@ struct au1xxx_irqmap { | |||
202 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 202 | { AU1000_RTC_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
203 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 203 | { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
204 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 204 | { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
205 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 205 | { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 1 }, |
206 | { AU1200_NAND_INT, IRQ_TYPE_EDGE_RISING, 0 }, | 206 | { AU1200_NAND_INT, IRQ_TYPE_EDGE_RISING, 0 }, |
207 | { AU1200_USB_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, | 207 | { AU1200_USB_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, |
208 | { AU1200_LCD_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, | 208 | { AU1200_LCD_INT, IRQ_TYPE_LEVEL_HIGH, 0 }, |