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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-07 14:15:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:52:53 -0500
commit788144656b8a862e724a1296e64ab6375eb541ed (patch)
tree96208eed56da25acdf9d923b9d9986e82dcd8944 /arch/mips/alchemy/common/time.c
parent93e9cd8485b31e5a33f1040bff4d15e65c0b2d19 (diff)
MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common/time.c')
-rw-r--r--arch/mips/alchemy/common/time.c35
1 files changed, 30 insertions, 5 deletions
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 379a664809b0..2aecb2fdf982 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2008 Manuel Lauss <mano@roarinelk.homelinux.net> 2 * Copyright (C) 2008-2009 Manuel Lauss <manuel.lauss@gmail.com>
3 * 3 *
4 * Previous incarnations were: 4 * Previous incarnations were:
5 * Copyright (C) 2001, 2006, 2008 MontaVista Software, <source@mvista.com> 5 * Copyright (C) 2001, 2006, 2008 MontaVista Software, <source@mvista.com>
@@ -85,7 +85,6 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = {
85 .name = "rtcmatch2", 85 .name = "rtcmatch2",
86 .features = CLOCK_EVT_FEAT_ONESHOT, 86 .features = CLOCK_EVT_FEAT_ONESHOT,
87 .rating = 100, 87 .rating = 100,
88 .irq = AU1000_RTC_MATCH2_INT,
89 .set_next_event = au1x_rtcmatch2_set_next_event, 88 .set_next_event = au1x_rtcmatch2_set_next_event,
90 .set_mode = au1x_rtcmatch2_set_mode, 89 .set_mode = au1x_rtcmatch2_set_mode,
91 .cpumask = cpu_all_mask, 90 .cpumask = cpu_all_mask,
@@ -98,11 +97,13 @@ static struct irqaction au1x_rtcmatch2_irqaction = {
98 .dev_id = &au1x_rtcmatch2_clockdev, 97 .dev_id = &au1x_rtcmatch2_clockdev,
99}; 98};
100 99
101void __init plat_time_init(void) 100static int __init alchemy_time_init(unsigned int m2int)
102{ 101{
103 struct clock_event_device *cd = &au1x_rtcmatch2_clockdev; 102 struct clock_event_device *cd = &au1x_rtcmatch2_clockdev;
104 unsigned long t; 103 unsigned long t;
105 104
105 au1x_rtcmatch2_clockdev.irq = m2int;
106
106 /* Check if firmware (YAMON, ...) has enabled 32kHz and clock 107 /* Check if firmware (YAMON, ...) has enabled 32kHz and clock
107 * has been detected. If so install the rtcmatch2 clocksource, 108 * has been detected. If so install the rtcmatch2 clocksource,
108 * otherwise don't bother. Note that both bits being set is by 109 * otherwise don't bother. Note that both bits being set is by
@@ -148,13 +149,18 @@ void __init plat_time_init(void)
148 cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd); 149 cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd);
149 cd->min_delta_ns = clockevent_delta2ns(8, cd); /* ~0.25ms */ 150 cd->min_delta_ns = clockevent_delta2ns(8, cd); /* ~0.25ms */
150 clockevents_register_device(cd); 151 clockevents_register_device(cd);
151 setup_irq(AU1000_RTC_MATCH2_INT, &au1x_rtcmatch2_irqaction); 152 setup_irq(m2int, &au1x_rtcmatch2_irqaction);
152 153
153 printk(KERN_INFO "Alchemy clocksource installed\n"); 154 printk(KERN_INFO "Alchemy clocksource installed\n");
154 155
155 return; 156 return 0;
156 157
157cntr_err: 158cntr_err:
159 return -1;
160}
161
162static void __init alchemy_setup_c0timer(void)
163{
158 /* 164 /*
159 * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this 165 * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
160 * function is called. Because the Alchemy counters are unusable 166 * function is called. Because the Alchemy counters are unusable
@@ -166,3 +172,22 @@ cntr_err:
166 r4k_clockevent_init(); 172 r4k_clockevent_init();
167 init_r4k_clocksource(); 173 init_r4k_clocksource();
168} 174}
175
176static int alchemy_m2inttab[] __initdata = {
177 AU1000_RTC_MATCH2_INT,
178 AU1500_RTC_MATCH2_INT,
179 AU1100_RTC_MATCH2_INT,
180 AU1550_RTC_MATCH2_INT,
181 AU1200_RTC_MATCH2_INT,
182};
183
184void __init plat_time_init(void)
185{
186 int t;
187
188 t = alchemy_get_cputype();
189 if (t == ALCHEMY_CPU_UNKNOWN)
190 alchemy_setup_c0timer();
191 else if (alchemy_time_init(alchemy_m2inttab[t]))
192 alchemy_setup_c0timer();
193}