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authorManuel Lauss <manuel.lauss@googlemail.com>2011-08-02 13:50:57 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-10-24 18:34:22 -0400
commit553737aa95016542780e7a4b4b810fef85c4eb72 (patch)
tree0cf2429c1ace23d7e5f9b35fcb8e4a287283c1d1 /arch/mips/alchemy/common/platform.c
parent08fa624f504e5edab6f69014fc92ecc7b2bbd81e (diff)
NET: au1000_eth: Pass MACDMA address through platform resource info.
This patch removes the last hardcoded base address from the au1000_eth driver. The base address of the MACDMA unit was derived from the platform device id; if someone registered the MACs in inverse order both would not work. So instead pass the base address of the DMA unit to the driver with the other platform resource information. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Acked-by: David S. Miller <davem@davemloft.net> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2674/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common/platform.c')
-rw-r--r--arch/mips/alchemy/common/platform.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index f72c48d4804c..15d9b2f14262 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -373,8 +373,8 @@ static struct platform_device pbdb_smbus_device = {
373#endif 373#endif
374 374
375/* Macro to help defining the Ethernet MAC resources */ 375/* Macro to help defining the Ethernet MAC resources */
376#define MAC_RES_COUNT 3 /* MAC regs base, MAC enable reg, MAC INT */ 376#define MAC_RES_COUNT 4 /* MAC regs, MAC en, MAC INT, MACDMA regs */
377#define MAC_RES(_base, _enable, _irq) \ 377#define MAC_RES(_base, _enable, _irq, _macdma) \
378 { \ 378 { \
379 .start = _base, \ 379 .start = _base, \
380 .end = _base + 0xffff, \ 380 .end = _base + 0xffff, \
@@ -389,28 +389,37 @@ static struct platform_device pbdb_smbus_device = {
389 .start = _irq, \ 389 .start = _irq, \
390 .end = _irq, \ 390 .end = _irq, \
391 .flags = IORESOURCE_IRQ \ 391 .flags = IORESOURCE_IRQ \
392 }, \
393 { \
394 .start = _macdma, \
395 .end = _macdma + 0x1ff, \
396 .flags = IORESOURCE_MEM, \
392 } 397 }
393 398
394static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = { 399static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
395 [ALCHEMY_CPU_AU1000] = { 400 [ALCHEMY_CPU_AU1000] = {
396 MAC_RES(AU1000_MAC0_PHYS_ADDR, 401 MAC_RES(AU1000_MAC0_PHYS_ADDR,
397 AU1000_MACEN_PHYS_ADDR, 402 AU1000_MACEN_PHYS_ADDR,
398 AU1000_MAC0_DMA_INT) 403 AU1000_MAC0_DMA_INT,
404 AU1000_MACDMA0_PHYS_ADDR)
399 }, 405 },
400 [ALCHEMY_CPU_AU1500] = { 406 [ALCHEMY_CPU_AU1500] = {
401 MAC_RES(AU1500_MAC0_PHYS_ADDR, 407 MAC_RES(AU1500_MAC0_PHYS_ADDR,
402 AU1500_MACEN_PHYS_ADDR, 408 AU1500_MACEN_PHYS_ADDR,
403 AU1500_MAC0_DMA_INT) 409 AU1500_MAC0_DMA_INT,
410 AU1000_MACDMA0_PHYS_ADDR)
404 }, 411 },
405 [ALCHEMY_CPU_AU1100] = { 412 [ALCHEMY_CPU_AU1100] = {
406 MAC_RES(AU1000_MAC0_PHYS_ADDR, 413 MAC_RES(AU1000_MAC0_PHYS_ADDR,
407 AU1000_MACEN_PHYS_ADDR, 414 AU1000_MACEN_PHYS_ADDR,
408 AU1100_MAC0_DMA_INT) 415 AU1100_MAC0_DMA_INT,
416 AU1000_MACDMA0_PHYS_ADDR)
409 }, 417 },
410 [ALCHEMY_CPU_AU1550] = { 418 [ALCHEMY_CPU_AU1550] = {
411 MAC_RES(AU1000_MAC0_PHYS_ADDR, 419 MAC_RES(AU1000_MAC0_PHYS_ADDR,
412 AU1000_MACEN_PHYS_ADDR, 420 AU1000_MACEN_PHYS_ADDR,
413 AU1550_MAC0_DMA_INT) 421 AU1550_MAC0_DMA_INT,
422 AU1000_MACDMA0_PHYS_ADDR)
414 }, 423 },
415}; 424};
416 425
@@ -429,17 +438,20 @@ static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
429 [ALCHEMY_CPU_AU1000] = { 438 [ALCHEMY_CPU_AU1000] = {
430 MAC_RES(AU1000_MAC1_PHYS_ADDR, 439 MAC_RES(AU1000_MAC1_PHYS_ADDR,
431 AU1000_MACEN_PHYS_ADDR + 4, 440 AU1000_MACEN_PHYS_ADDR + 4,
432 AU1000_MAC1_DMA_INT) 441 AU1000_MAC1_DMA_INT,
442 AU1000_MACDMA1_PHYS_ADDR)
433 }, 443 },
434 [ALCHEMY_CPU_AU1500] = { 444 [ALCHEMY_CPU_AU1500] = {
435 MAC_RES(AU1500_MAC1_PHYS_ADDR, 445 MAC_RES(AU1500_MAC1_PHYS_ADDR,
436 AU1500_MACEN_PHYS_ADDR + 4, 446 AU1500_MACEN_PHYS_ADDR + 4,
437 AU1500_MAC1_DMA_INT) 447 AU1500_MAC1_DMA_INT,
448 AU1000_MACDMA1_PHYS_ADDR)
438 }, 449 },
439 [ALCHEMY_CPU_AU1550] = { 450 [ALCHEMY_CPU_AU1550] = {
440 MAC_RES(AU1000_MAC1_PHYS_ADDR, 451 MAC_RES(AU1000_MAC1_PHYS_ADDR,
441 AU1000_MACEN_PHYS_ADDR + 4, 452 AU1000_MACEN_PHYS_ADDR + 4,
442 AU1550_MAC1_DMA_INT) 453 AU1550_MAC1_DMA_INT,
454 AU1000_MACDMA1_PHYS_ADDR)
443 }, 455 },
444}; 456};
445 457