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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-07 14:15:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:52:53 -0500
commit788144656b8a862e724a1296e64ab6375eb541ed (patch)
tree96208eed56da25acdf9d923b9d9986e82dcd8944 /arch/mips/alchemy/common/dma.c
parent93e9cd8485b31e5a33f1040bff4d15e65c0b2d19 (diff)
MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common/dma.c')
-rw-r--r--arch/mips/alchemy/common/dma.c36
1 files changed, 31 insertions, 5 deletions
diff --git a/arch/mips/alchemy/common/dma.c b/arch/mips/alchemy/common/dma.c
index d6fbda232e6a..d5278877891d 100644
--- a/arch/mips/alchemy/common/dma.c
+++ b/arch/mips/alchemy/common/dma.c
@@ -29,6 +29,8 @@
29 * 675 Mass Ave, Cambridge, MA 02139, USA. 29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 * 30 *
31 */ 31 */
32
33#include <linux/init.h>
32#include <linux/module.h> 34#include <linux/module.h>
33#include <linux/kernel.h> 35#include <linux/kernel.h>
34#include <linux/errno.h> 36#include <linux/errno.h>
@@ -188,17 +190,14 @@ int request_au1000_dma(int dev_id, const char *dev_str,
188 dev = &dma_dev_table[dev_id]; 190 dev = &dma_dev_table[dev_id];
189 191
190 if (irqhandler) { 192 if (irqhandler) {
191 chan->irq = AU1000_DMA_INT_BASE + i;
192 chan->irq_dev = irq_dev_id; 193 chan->irq_dev = irq_dev_id;
193 ret = request_irq(chan->irq, irqhandler, irqflags, dev_str, 194 ret = request_irq(chan->irq, irqhandler, irqflags, dev_str,
194 chan->irq_dev); 195 chan->irq_dev);
195 if (ret) { 196 if (ret) {
196 chan->irq = 0;
197 chan->irq_dev = NULL; 197 chan->irq_dev = NULL;
198 return ret; 198 return ret;
199 } 199 }
200 } else { 200 } else {
201 chan->irq = 0;
202 chan->irq_dev = NULL; 201 chan->irq_dev = NULL;
203 } 202 }
204 203
@@ -226,13 +225,40 @@ void free_au1000_dma(unsigned int dmanr)
226 } 225 }
227 226
228 disable_dma(dmanr); 227 disable_dma(dmanr);
229 if (chan->irq) 228 if (chan->irq_dev)
230 free_irq(chan->irq, chan->irq_dev); 229 free_irq(chan->irq, chan->irq_dev);
231 230
232 chan->irq = 0;
233 chan->irq_dev = NULL; 231 chan->irq_dev = NULL;
234 chan->dev_id = -1; 232 chan->dev_id = -1;
235} 233}
236EXPORT_SYMBOL(free_au1000_dma); 234EXPORT_SYMBOL(free_au1000_dma);
237 235
236static int __init au1000_dma_init(void)
237{
238 int base, i;
239
240 switch (alchemy_get_cputype()) {
241 case ALCHEMY_CPU_AU1000:
242 base = AU1000_DMA_INT_BASE;
243 break;
244 case ALCHEMY_CPU_AU1500:
245 base = AU1500_DMA_INT_BASE;
246 break;
247 case ALCHEMY_CPU_AU1100:
248 base = AU1100_DMA_INT_BASE;
249 break;
250 default:
251 goto out;
252 }
253
254 for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++)
255 au1000_dma_table[i].irq = base + i;
256
257 printk(KERN_INFO "Alchemy DMA initialized\n");
258
259out:
260 return 0;
261}
262arch_initcall(au1000_dma_init);
263
238#endif /* AU1000 AU1500 AU1100 */ 264#endif /* AU1000 AU1500 AU1100 */