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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2014-06-13 07:28:12 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-06-25 11:50:07 -0400
commit8cbff69ca9d57ee53656d187f77774501794bf27 (patch)
tree1162580c1232345add43bcd36d4e0914232b318c /arch/mips/alchemy/common/clocks.c
parentb6616f11a85af3868e5080ef38846a0cbc496ed9 (diff)
ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3] range. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/mips/alchemy/common/clocks.c')
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