MIPS: make cp0 counter clocksource/event usable as fallback.

The current mips clock build infrastructure lets a system only use
either the MIPS cp0 counter or a SoC specific timer as a clocksource /
clockevent device.

This patch renames the core cp0 counter clocksource / clockevent functions
from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to
call these renamed functions instead.

Chips which can detect whether it is safe to use a chip-specific timer
can now fall back on the cp0 counter if necessary and possible
(e.g. Alchemy with a follow-on patch).

Existing behaviour is not changed in any way.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 8 insertions, 0 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 424ff744d07f..52c80c2a57f2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -721,7 +721,11 @@ config CEVT_DS1287
 config CEVT_GT641XX
         bool
 
+config CEVT_R4K_LIB
+        bool
+
 config CEVT_R4K
+        select CEVT_R4K_LIB
         bool
 
 config CEVT_SB1250
@@ -736,7 +740,11 @@ config CSRC_BCM1480
 config CSRC_IOASIC
         bool
 
+config CSRC_R4K_LIB
+        bool
+
 config CSRC_R4K
+        select CSRC_R4K_LIB
         bool
 
 config CSRC_SB1250