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authorDavid Daney <ddaney@caviumnetworks.com>2009-01-05 18:29:58 -0500
committerRalf Baechle <ralf@linux-mips.org>2009-01-30 16:32:58 -0500
commit8bc6d05b481aa7dc79c81b8ffac0da755e149643 (patch)
tree0c6b7c62dbec9d598546c7e58cb13c0c78212a1e /arch/mips/Kconfig
parent7adbedaf4469dcdcd6a1ab9bdeb8ad854d4f9827 (diff)
MIPS: Read watch registers with interrupts disabled.
If a context switch occurred between the watch exception and reading the watch registers, it would be possible for the new process to corrupt their state. Enabling interrupts only after the watch registers are read avoids this race. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
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